BSC 031 N 06 NS 3 Search Results

ixgk32n60

Contextual Info: ÎXYS HiPerFAST IGBT IXGH 32N60A 1XGH 32N60AS CES ^C25 v CE sat t,i Symbol Test Conditions v CES T j = 25°C to 150°C v CGR T j = 25°C to 150°C; RGE = 1 M il 600 V Continuous ±20 V V* GEM Transient ±30 V ^C25 Tc = 25°C 60 A Tc = 90°C 32 A ^CM Tc = 25“C, 1 ms

TSPC603R

Abstract: microprocessor LNM80 DH21
Contextual Info: TSPC603R PowerPC 603e RISC Microprocessor Family PID7t-603e Datasheet Features • • • • • • • Superscalar 3 Instructions per Clock Peak Dual 16 KB Caches Selectable Bus Clock 32-bit Compatibility PowerPC Implementation On-chip Debug Support

32N50

Contextual Info: HiPerFAST IGBT with Diode IXGH 32N50BU1 IXGH 32N50BU1S v CES ^C25 v CE sat «1, Symbol Test Conditions Maximum Ratings V ces Tj = 25CC to 150CC 500 v CGR T j = 25°C to 150“ C; RGE = 1 M£2 500 V v GES Continuous ±20 V v¥gem Transient ±30 V ^C25 T0 = 25°C

MX877

Abstract: IXYS cs
Contextual Info: IXYS MX877 8-Channel, 60V Relay/Load Driver Push-Pull Output, 3 Wire Interface Features: General Description • • • • • • • • The MX877 is an 8 channel high voltage switch with 8-bit parallel or serial input control. The MX877 connects directly to a microprocessor through a

Contextual Info: IXYS MX879 8-Channel, 60V Relay/Load Driver Open Drain Output, 3 Wire Interface Features: General Description • • • • • • • • The MX879 is an 8 channel high voltage switch with 8-bit parallel or serial input control. The MX879 connects directly to a microprocessor through a

mx878

Contextual Info: IXYS MX878 8-Channel, 60V Relay/Load Driver Open Drain Output, 3 Wire Interface Features: General Description • • • • • • • • The MX878 is an 8 channel high voltage switch with 8-bit parallel or serial input control. The MX878 connects directly to a microprocessor through a

30n60b

Abstract: B2045
Contextual Info: □ IXYS v CES High Speed IGBT t, 600 V 2.0 V 140 ns 600 V 2.5 V 70 ns IXSH/IXST 30N60B IXSH/IXST 30N60C ^CES Short Circuit SOA Capability Preliminary Data Sheet Maximum Ratings Symbol Test C onditions V CES Td = 25°C to 150°C 600 V V CGR Td = 25°C to 150°C; RGE = 1 M£i

MC74ACT138

Abstract: EIAJ-16 948F MC74AC138 MC74AC138D MC74AC138DR2 MC74AC138N MC74ACT138D MC74ACT138N
Contextual Info: MC74AC138, MC74ACT138 1−of−8 Decoder/Demultiplexer T h e M C 7 4 A C 1 3 8 / 7 4 A C T 1 3 8 i s a h i g h −s p e e d 1 −o f −8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24

0828H

Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

cga motorola

Abstract: PowerPC755 PC755B 2138F CBGA360 MPC7400 PC745 PC755 PCX755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

2138F

Abstract: CBGA360 MPC7400 PC745 PC755 ATMEL 745 PCX755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

cga motorola

Abstract: CBGA360 MPC7400 PC745 PC755 N-19 CI-CGA360 PowerPC755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

1ZI1

Abstract: pk100-1 PK1001
Contextual Info: í:jW>s\í> ^dt Integrated De\/ice Technology, Inc. 32K x 32 MCache SYNCHRONOUS PIPELINED CACHE RAM FEATURES: • Uses IDT's Fusion Memory technology • 66 and 75 MHz speed grades • 3-1-1-1 Pipelined Burst Read • 3-1-1-1 Pipelined Burst Write • 3-1-1-1-1-1-1-1. extended pipelined operation

Ali 3601

Abstract: WF128K32NA-70HQ5 QML-38534 F128K32N k3212 5962-9471602HSA k329 5962-9471604H8C
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Add device type 05, case outlines M, N, 4, 5, 6, 7, and 8. Add vendor 96-08-30 K. A. Cottongim _CAGE code

demultiplexer 1 to 4 outputs HF

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA L o w -V o ltag e Q uiet CMOS 1 -o f-8 D ecoder/D em ultiplexer M C74LVQ 138 LVQ The MC74LVQ138 is a high performance, 1-of-8 decoder/ demultiplexer operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers

Contextual Info: IXGH 38N60U1 Ultra-Low VCE sat IGBT with Diode Symbol ^C25 v Maximum Ratings Test Conditions VCES ^ 600 V VCGB Td = 25°C to 150°C; RGE = 1 M il 600 V VGES Continuous ±20 V v GEM Transient ±30 V ^C25 Tc = 25°C 76 A ^C90 Tc = 90°C 38 A 152 A ' cm = 25°C to 150°C

Contextual Info: ISSI IS41LV32256 256K x 32 8-Mbit EDO DYNAMIC RAM 3.3V, 100/83/66 MHz ADVANCE INFORMATION APRIL 1998 FEATURES DESCRIPTION • 262,144-word by 32-bit organization The I S S I IS41LV32256 is organized in a 262,122 x 32-bit CMOS Dynamic Random Access Memory. Four CAS signals

Contextual Info: □ IXYS HiPerFET Power MOSFETs IXFH40N30Q IXFT40N30Q V D S S 300 40 85 < 200 = ^ D 2 5 D Q Class D S o n N-Channel Enhancement Mode Avalanche Rated Highdv/dt, LowQg t r r V A mQ ns Preliminary data Maximum Ratings Symbol Test Conditions V Td = 25°C to 150°C

Mosfet K 135 To3

Abstract: a 1712 mosfet 11P50 ixtm11p50
Contextual Info: IDE D 1 4t.at.Bat. o o o a a s i i I I X Y S CORP _T ~ -3 <?- 2 3 □ IXYS P-CHANNEL MOSFETS IXTH11P50, 45 IXTM11P50, 45 MAXIMUM RATINGS IX T H 1 1 P 5 0 ' IX T H 1 1 P if5 Parameter Sym. IX T M 1 1 P 5 0 IX T M 1 1 P ^ 5 Drain-Source Voltage 1

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3 -to -8 Line Decoder M C74LVX138 W ith 5V -T o leran t Inputs The MC74LVX138 is an advanced high speed CMOS 3 -to -8 line decoder. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

IXGH32N60C

Abstract: 610MJ
Contextual Info: Advanced Data _ HiPerFAST IGBT Lightspeed™ Series vCES IXGH32N60C IXGH32N60CS 600 V 60 A 2.1 V 55 ns ^C25 vCE sat typ * fi typ 4 Symbol Test Conditions V • ces TJ vcaR C Maximum Ratings 25°C to 150°C 600 V Tj = 25°C to 150°C; RGE = 1 M£3

IXLH35N140A

Contextual Info: ÖIXYS High Voltage, High speed IGBT IXLH 35N140 A V CES = 1400 V ^C25 = 58 A = 3.6 V vCE sat Short Circuit SOA Capability P re lim in a ry d a ta ) °\^ *S OE Symbol Test Conditions Maximum Ratings v CES Tj = 25°C to 150°C 1400 V V CGR Td = 25°C to 150°C; RGE = 1 M£2

MC74ACT138

Contextual Info: MC74AC138, MC74ACT138 1−of−8 Decoder/Demultiplexer T h e M C 7 4 A C 1 3 8 / 7 4 A C T 1 3 8 i s a h i g h−sp e e d 1 −o f −8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24

5 to 32 decoder

Abstract: 5 to 32 decoder circuit MC74ACT138 32 line to 5 decoder Decoder 5 to 32 948F MC74AC138 MC74AC138D MC74AC138DR2 MC74AC138N
Contextual Info: MC74AC138, MC74ACT138 1−of−8 Decoder/Demultiplexer T h e M C 7 4 A C 1 3 8 / 7 4 A C T 1 3 8 i s a h i g h−s p e e d 1 −o f −8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24