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    CY62147CV30 Price and Stock

    Rochester Electronics LLC CY62147CV30LL-55BAI

    IC SRAM 4MBIT PARALLEL 48FBGA
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    Rochester Electronics LLC CY62147CV30LL-70BAI

    IC SRAM 4MBIT PARALLEL 48FBGA
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    Rochester Electronics LLC CY62147CV30LL-70BVI

    IC SRAM 4MBIT PARALLEL 48VFBGA
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    DigiKey CY62147CV30LL-70BVI Bulk 107
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    Rochester Electronics LLC CY62147CV30LL-70BAIT

    IC SRAM 4MBIT PARALLEL 48FBGA
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    DigiKey CY62147CV30LL-70BAIT Bulk 89
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    Rochester Electronics LLC CY62147CV30LL-70BVIT

    IC SRAM 4MBIT PARALLEL 48VFBGA
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    CY62147CV30 Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY62147CV30 Cypress Semiconductor Original PDF
    CY62147CV30LL-55BAI Cypress Semiconductor Original PDF
    CY62147CV30LL-55BVI Cypress Semiconductor 256K x 16 Static RAM Original PDF
    CY62147CV30LL-70BAI Cypress Semiconductor Original PDF
    CY62147CV30LL-70BVI Cypress Semiconductor 256K x 16 Static RAM Original PDF

    CY62147CV30 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features • Temperature Ranges — Industrial: –40°C to +85°C — Automotive: –40°C to +125°C • Very high speed: 45 ns • Wide voltage range: 2.20V–3.60V • Pin-compatible with CY62147CV25, CY62147CV30, and


    Original     		PDF CY62147DV30 CY62147CV25, CY62147CV30, CY62147CV33 48-ball 44-pin 70-ns 45-ns 44-lead

    CS16LV40963

    Abstract: BS62LV4006 sram cross reference CS18LV40963 LY6264 Hynix Cross Reference cs18lv10245 cs18lv02560 LY621024 K6X1008C2D
    Text: www.ashlea.co.uk 01793 783784 Low power SRAM Cross Reference Density Configuration 64K 8Kx8 256K 32Kx8 Lyontek LY6264 LY62L64 LY62256 LY62L256 LY62256 2.7-5.5 1M 128Kx8 64Kx16 LY621024 LY62L1024 LY62L6416 Samsung K6X0808C1D K6X0808T1D K6X1008C2D K6X1008T2D


    Original     		PDF 32Kx8 LY6264 LY62L64 LY62256 LY62L256 LY62256 128Kx8 64Kx16 LY621024 LY62L1024 CS16LV40963 BS62LV4006 sram cross reference CS18LV40963 LY6264 Hynix Cross Reference cs18lv10245 cs18lv02560 LY621024 K6X1008C2D

    ultra fine pitch BGA

    Abstract: CY62147CV25 CY62147CV30 CY62147CV33 CY62147V
    Text: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		PDF CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33 ultra fine pitch BGA CY62147CV25 CY62147CV30 CY62147CV33 CY62147V

    CY62147CV25

    Abstract: CY62147CV30 CY62147CV33 CY62147DV30
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life (MoBL ) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces


    Original     		PDF CY62147DV30 I/O15) 70-ns 45-ns 44-lead CY62147CV25 CY62147CV30 CY62147CV33 CY62147DV30

    Untitled

    Abstract: No abstract text available
    Text: CY62147CV25/30/33 ADVANCE INFORMATION MoBL 256K x 16 Static RAM are placed in a high-impedance state when: deselected CE HIGH , outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).


    Original     		PDF CY62147CV25/30/33 CY62147CV25: CY62147CV30: CY62147CV33:

    Untitled

    Abstract: No abstract text available
    Text: 1May 7, 2001May 7, 2001*CY62147V MoBL CY62147CV25/30/33 ADVANCE INFORMATION MoBLTM 256K x 16 Static RAM Features and BHE are HIGH. The input/output pins I/O0 through I/O15 are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are


    Original     		PDF 2001May CY62147V CY62147CV25/30/33 CY62147CV25: CY62147CV30: CY62147CV33: I/O15)

    vhdl code for dice game

    Abstract: Video Proc 3.3V 0.07A 64-Pin PQFP ez811 GRAPHICAL LCD interfaced with psoc 5 cypress ez-usb AN2131QC CYM9239 vhdl code PN 250 code generator CY3649 cy7c63723 Keyboard and Optical mouse program CY7C9689 ethernet
    Text: Product Selector Guide Communications Products Description Pins Part Number Freq. Range Mbps ICC (mA) Packages* 3.3V SONET/SDH PMD Transceiver 2.5V SiGe Low Power SONET/SDH Transceiver SONET/SDH Transceiver w/ 100K Logic 2.5 G-Link w/ 100K Logic OC-48 Packet Over SONET (POS) Framer


    Original     		PDF OC-48 CYS25G0101DX CYS25G0102 CYS25G01K100 CYP25G01K100 CY7C9536 CY7C955 CY7B952 CY7B951 10BASE vhdl code for dice game Video Proc 3.3V 0.07A 64-Pin PQFP ez811 GRAPHICAL LCD interfaced with psoc 5 cypress ez-usb AN2131QC CYM9239 vhdl code PN 250 code generator CY3649 cy7c63723 Keyboard and Optical mouse program CY7C9689 ethernet

    TSOP44 Package

    Abstract: HY628400ALLG-70 HY62WT08081E-DG70I HY628100BLLG-70 SO28 package datasheet cy62127bvll-70bai so32 HY628400ALLT2-70 M68AF511AL55MC1 K6T1008C2E-GB70
    Text: Static Random Access Memories Asynchronous low power and synchronous fast SRAM solutions www.st.com/sram Selection Guide with Cross Reference STM i c r o e l e c t r o n i c s More Intelligent Solutions Static Random Access Memories STMicroelectronics has decided to target different growing market segments


    Original     		PDF

    TC554161A

    Abstract: HY62WT08081E K6X8008C2B CY62148E r1lv0416 K6F1616 k6t0808c1d BH616UV4010 BH616UV8010 BH62UV4000
    Text: BSI Ultra Low Power SRAM Cross Reference Table BH-Series Density Config. x8 Part No. BH62UV4000 Speed ns 55 Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax 2uA 1.5mA N.A. 2uA N.A 9mA Voltage (V) Renesas Hynix BH616UV4010 55 2uA 2uA N.A 1.5mA 9mA


    Original     		PDF BH62UV4000 BH616UV4010 BH62UV8000 BH616UV8010 BH62UV1600 BH616UV1610 TC55V4000 TC55VEM208ASTN T16LV8017 K6X8008T2B TC554161A HY62WT08081E K6X8008C2B CY62148E r1lv0416 K6F1616 k6t0808c1d BH616UV4010 BH616UV8010 BH62UV4000

    HM628100

    Abstract: HM6216514 M5M5256D-L K6X0808C1D BS616LV1010 BS616LV2016 BS616LV2019 BS616UV2019 K6X8008C2B BS62LV2006
    Text: BSI Low Power SRAM Cross Reference Table Nov-30-2008 Density Configuration Part No. Speed ns Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax Voltage (V) Samsung Cypress 2.4~5.5 x8 BS62LV256 70 0.05uA 0.1uA 0.4uA 1mA 20mA 35mA BS62LV1027 55/70 0.1uA


    Original     		PDF Nov-30-2008 BS62LV256 M5M5256D-G K6X0808T1D CY62256V IS62LV256AL BS62LV1027 BS616LV1010 CY62256 M5M5256D-L HM628100 HM6216514 M5M5256D-L K6X0808C1D BS616LV1010 BS616LV2016 BS616LV2019 BS616UV2019 K6X8008C2B BS62LV2006

    Untitled

    Abstract: No abstract text available
    Text: 147V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		PDF CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33

    TC55VEM416AXBN

    Abstract: K6F8016U6B HY62WT08081E K6X4008C1F BH-Series CY62147CV30 Hynix Cross Reference samsung k6x1008c2d CY62148E TC55VEM216ABXN
    Text: BSI Ultra Low Power SRAM Cross Reference Table BH-Series Density Config. x8 Part No. BH62UV4000 Speed ns 55 Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax 2uA 1.5mA N.A. 2uA N.A 9mA Voltage (V) Renesas Hynix BH616UV4010 55 2uA 2uA N.A 1.5mA 9mA


    Original     		PDF BH62UV4000 BH616UV4010 BH62UV8000 BH616UV8010 BH62UV1600 BH616UV1610 TC55V4000 TC55VEM208ASTN T16LV8017 K6X8008T2B TC55VEM416AXBN K6F8016U6B HY62WT08081E K6X4008C1F BH-Series CY62147CV30 Hynix Cross Reference samsung k6x1008c2d CY62148E TC55VEM216ABXN

    Untitled

    Abstract: No abstract text available
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features power consumption. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable


    Original     		PDF CY62147DV30 I/O15) CY62147CV25, CY62147CV30, CY62147CV33 Writ56K 70-ns

    CY62147DV30

    Abstract: CY62147CV25 CY62147CV30 CY62147CV33
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life (MoBL ) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces


    Original     		PDF CY62147DV30 I/O15) 70-ns 45-ns 44-lead CY62147DV30 CY62147CV25 CY62147CV30 CY62147CV33

    Untitled

    Abstract: No abstract text available
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features an automatic power-down feature that significantly reduces power consumption. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The


    Original     		PDF CY62147DV30 I/O15) CY62147CV25, CY62147CV30, CY62147CV33 70-ns 45-ns 44-lead

    Untitled

    Abstract: No abstract text available
    Text: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		PDF CY62147CV25/30/33 CY62147CV25: CY62147CV30: CY62147CV33: CY62147V

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE INFORMATION CY62147DV30 4 Mb 256K x 16 Static RAM Features The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when:


    Original     		PDF CY62147DV30 CY62147CV25, CY62147CV30, CY62147CV33 48-ball 44-pin I/O15) CY62147DV30

    Cp5609amt

    Abstract: cp5858am CP5629BM CG5113 PCN030073 W48S111-14G 5L512 CY2292ASI CY2292SL-1V1 CY2292SC-68T
    Text: SEMICONDUCTOR FINAL PRODUCT CHANGE NOTIFICATION PCN: PCN030073 DATE: November 7, 2003 Subject: Prune List Q4, 2003 To: Description of Change: Cypress is officially announcing the obsolescence of these products. Refer to the attached list for the list of products being discontinued.


    Original     		PDF PCN030073 reprrese1/03/03 Cp5609amt cp5858am CP5629BM CG5113 PCN030073 W48S111-14G 5L512 CY2292ASI CY2292SL-1V1 CY2292SC-68T

    Untitled

    Abstract: No abstract text available
    Text: CY62147DV30 4-Mbit 256K x 16 Static RAM Features vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life (MoBL ) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces


    Original     		PDF CY62147DV30 I/O15) 70-ns 45-ns 44-lead

    CY62147V

    Abstract: No abstract text available
    Text: CY62147V MoBL 4M 256K x 16 Static RAM Features • • • • • • • deselected (CE HIGH) or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are


    Original     		PDF CY62147V I/O15) 44-pin CY62147CV30)

    CY62147CV25

    Abstract: CY62147CV30 CY62147CV33 CY62147V
    Text: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		PDF CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33 CY62147CV25 CY62147CV30 CY62147CV33 CY62147V