DS2188 Search Results

cept lpd d

Contextual Info: DALLAS DS2188 T1/CEPT Jitter Attenuator s e m ic o n d u c to r PIN ASSIGNMENT FEATURES • Attenuates clock and datajitter present inT1 orCEPT lines C 1 16 H VDD RPOS C 2 15 RNEG C 3 14 RCLK C 4 13 C 5 L 6 C 7 C 8 12 D □ H 1 Il D H DJA • Meets the jitter attenuation templates outlined in

DS2141A

Abstract: DS2180A DS2181A DS2186 DS2187 DS2188 DS2188S DS2190 TR62411
Contextual Info: DS2188 DS2188 T1/CEPT Jitter Attenuator FEATURES PIN ASSIGNMENT • Attenuates clock and data jitter present in T1 or CEPT lines • Meets the jitter attenuation templates outlined in TR62411, TR–TSY–000170, G.735, and G.742 • Only one external component required; either a 6.176

DS2141A

Abstract: DS2180A DS2181A DS2186 DS2187 DS2188 DS2188S DS2190 TR62411 1k transmit buffer
Contextual Info: DS2188 DS2188 T1/CEPT Jitter Attenuator FEATURES PIN ASSIGNMENT • Attenuates clock and data jitter present in T1 or CEPT lines • Meets the jitter attenuation templates outlined in TR62411, TR–TSY–000170, G.735, and G.742 • Only one external component required; either a 6.176

DS2180A

Abstract: DS2186 DS2187 DS2188 DS2188N DS2188S DS2188SN TR62411
Contextual Info: DS2188 T1/CEPT Jitter Attenuator www.dalsemi.com FEATURES PIN ASSIGNMENT Attenuates clock and data jitter present in T1 or CEPT lines Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 Only one external component required; either

ds1288 datasheet

Abstract: DS2180A DS2186 DS2187 DS2188 DS2188N DS2188S DS2188SN TR62411 DS1288S
Contextual Info: DS2188 T1/CEPT Jitter Attenuator www.dalsemi.com FEATURES PIN ASSIGNMENT Attenuates clock and data jitter present in T1 or CEPT lines Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 Only one external component required; either

Contextual Info: li DS2188 T1/CEPT Jitter Attenuator lew Ew* s e m ic o n d u c t o r PIN ASSIGNMENT FEATURES • Attenuates clock and data jitter present in T1 or CEPT lines ■ Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 ■ Only one external component required; either

DS2180A

Abstract: DS2181A DS2186 DS2187 DS2188 DS2188S TR62411
Contextual Info: DS 2188 DALLAS SEMICONDUCTOR DS2188 T1/CEPT Jitter Attenuator PIN ASSIGNMENT FEATURES • A ttenuates clock and data jitte r present in T1 o rC E P T lines • Meets the jitte r attenuation tem plates outlined in TR62411, T R -T S Y -0 0 0 1 7 0 , G.735, and G.742

Contextual Info: DS2188 DALLAS SEMICONDUCTOR DS2188 T1/CEPT Jitter Attenuator FEATURES PIN ASSIGNMENT • Attenuates clock and data jitter present in T1 orCEPT lines • Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 rl DJA L VDD

Attenuator chip

Contextual Info: DS2188/DS2188S FULL DATA SHEET AVAILABLE - CALL 214-450-3836 DALLAS SEMICONDUCTOR T 1/C E P T Jitter Attenuator Chip FEATURES PIN DESCRIPTION DS2188 • Attenuates clock and data jitter present in T1 or CEPT lines DJA 1Q □ 16 VDD RPOS 2\Z □ • Meets the jitter attenuation templates outlined in

ic 8870

Abstract: PS041 PS042 PS050 PS051 PS052 PS5100 PS5162 PS5163 PS5164
Contextual Info: PS050, PowerTool 500 Development Software User’s Guide  2004 Microchip Technology Inc. DS21885B Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to

S2188

Abstract: XTAL 12.8 MHz
Contextual Info: DS2188 DALLAS SEMICONDUCTOR FE A T U R E S • Attenuates clock and data jitter present in T1 orCEPT lines • Meets the jitter attenuation templates outlined in TR62411, TR -TSY-000170, G.735, and G.742 • Only one external component required; either a 6.176

Contextual Info: DS2188/DS218BS DALLAS SEMICONDUCTOR DS2188 T1/CEPT JITTER ATTENUATOR FEATURES PIN DESCRIPTION • Attenuates clock and data jitter present in T1 or CEPT lines DJA I Q RPOS • Meets the jitterattenuation templates outlined in TR62411, TR-TSY-000170, G.735, and

Contextual Info: DALLAS DS2188 T1/C E P T Jitter Attenuator s e m ic o n d u c t o r PIN ASSIGNMENT FEATURES • Attenuates clock and data jitter present in T1 orCEPT lines • Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 • Only one external component required; either a 6.176

DS2180A

Abstract: DS2181A DS2186 DS2187 DS2188 DS2188S DS2190 TR62411
Contextual Info: DS2188 T1/CEPT Jitter Attenuator www.dalsemi.com PIN ASSIGNMENT FEATURES § § § § § § § § Attenuates clock and data jitter present in T1 or CEPT lines Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742 Only one external component required; either

ap08

Abstract: DS2143 DS2180A DS2181A DS2186 DS2187 DS2188 DS5000
Contextual Info: DS2186 DS2186 DALLAS SEMICONDUCTOR FEATURES Transmit Line Interface PIN ASSIGNMENT • Line interface for T1 1.544 MHz and CEPT (2.048 MHz) primary rate networks TAIS Q 1 ZCSEN Q 2 • On-chip transmit LBO (line build out) and line drivers eliminate external components

624C

Abstract: DS1204U DS1205S DS1228S DS1640
Contextual Info: DALLAS SEMICONDUCTOR DS1205S M ultiKey Chip FEATURES PIN ASSIGNMENT • T h re e s e c u re re a d /w rite d a ta p a rtitio n s o f 3 8 4 bits VCCI la s e r e tc h e d 15 3 14 m DQ o n 4 13 ~ n n GND 5 12 CLK QC 6 11 ~n~i d q o e MC Q j- 7 10 m GND m~ NC

Contextual Info: DS2180A DALLAS SEMICONDUCTOR DS2180A T1 Transceiver FEATURES PIN ASSIG NM ENT • Single chip DS1 rate transceiver TMSYNC [ • Supports common framing standards - 12 frames/superframe “193S” - 24 frames/superframe “193E” 1 w 39 ] RLOS TCLK [ 3 TCHCLK [ 4

1 microfarad capacitor

Abstract: 18-PIN DS2141A DS2143 DS2180A DS2181A DS2186 DS2187 DS2188 DS5000
Contextual Info: DS2187 DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT • Line interface for T1 1.544 MHz and CEPT (2.048 MHz) primary rate networks • Extracts clock and data from twisted pair or coax • Meets requirements of PUB 43801, TR 62411, and applicable CCITT G.823

Contextual Info: DALLAS s e m ic o n d u c to r FEATURES • Line interface forT1 1.544 MHz and CEPT (2.048 MHz) primary rate networks • O n-chip transmit LBO (line build out) and line drivers eliminate external components • Programmable output pulse shape supports shortand long-loop applications

Contextual Info: DS2190-003 DALLAS SEMICONDUCTOR DS2190-003 T1 Network Interface Unit NIU PIN ASSIGNMENT FEATURES • Modularized network interface for 1.544 Mbps T 1 ser­ vices • Network side connects directly to T1 line • Compatible with DS2180A or DS2141A T1 /ISDN Pri­

Contextual Info: DS2141A DALLAS SEMICONDUCTOR D S 2141A T1 Controller PIN ASSIGNMENT FEATURES • DS1/ISDN-PRI framing transceiver TCLK [ t TSER C 2 • Frames to D4, ESF, and SLC-96 formats TCHCLK [ 3 TPOS [ 4 • Parallel control port TNEG [ 5 • Onboard, dual two-frame elastic store slip buffers

MCP6231

Abstract: MCP6231R MCP6231U MCP6232 MCP6234 6234E 6232E
Contextual Info: MCP6231/2/4 20 µA, 300 kHz Rail-to-Rail Op Amp Features Description • • • • • • The Microchip Technology Inc. MCP6231/2/4 operational amplifiers op amps provide wide bandwidth for the quiescent current. The MCP6231/2/4 family has a 300 kHz Gain Bandwidth Product (GBWP) and 65°

bv9 transistor

Abstract: 2F 1 marking slc 500 circuit diagram DS2141A DS2141Q DS2186 DS2187 DS2188 DS2290 DS2291
Contextual Info: DS2141A DS2141A T1 Controller FEATURES PIN ASSIGNMENT • DS1/ISDN–PRI framing transceiver TCLK 1 40 VDD TSER 2 39 TSYNC TCHCLK 3 38 TLINK TPOS 4 37 TLCLK TNEG 5 36 INT1 AD0 6 35 INT2 • Extracts and inserts robbed–bit signaling AD1 7 • Programmable output clocks

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC