IC 7402 LOGIC SYMBOL Search Results

7402 quad 2- input nor gate

Abstract: 7402 quad 2 input not 7402 TTL 7402 logic diagram 7402 NOR gate 7402 ttl gate 9N02 9N02 7402 TTL 7402 9N02/7402
Contextual Info: FAIRCHILD TT L/SSI • 9N02/5402, 7402 QUAD 2-INPUT NOR GATE SCHEMATIC DIAGRAM EACH GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) FLATPAK (TOP VIEW) T5TS1 ra r?l Positive logic: Y = A+B C o m p o n e n t values show n are ty p ic a l. RECOMMENDED OPERATING CONDITIONS

7402 NOR gate ic pin configuration

Abstract: IC 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74LS02 pin configuration 74LS02 function table 7402 ic ttl 7402 7402 logic gate ic IC 74LS02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; Ta = 0°C to +70°C

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

74S02N

Abstract: 7402 NOR gate ic pin configuration IC 7402 74LS02N LS 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74ls02 signetics 7402 quad 2 input not 74LS02 pin configuration
Contextual Info: Signetìcs I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7402 10ns 11m A 74LS 02 10ns 2.2m A 74S 02 3.5ns 22m A ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

IC 7402

Abstract: IC TTL 7402 74LS02 gate diagram logic diagram of ic 7402 54LS02 TTL SN7402
Contextual Info: SN 5402, SN 54 LS0 2, SN 54S02, SN 7402, SN 74LS02, SN 74S02 QUADRUPLE 2-INPUT POSITIVE NOR GATES DECEMBER 1 9 8 3 -R E V IS E D MARC H 1 9 6 8 • Package Options Include Plastic "Sm all O utline” Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

IC 7402, 7404, 7408, 7432, 7400

Abstract: TTL IC 7405 7400 logic gate ic IC AND GATE 7408 ic 7400 logic symbol 7408 AND GATE fan in 9N01 IC 7400 nand gate 7408, 7404, 7486, 7432 IC 7404 hex inverter
Contextual Info: SSI • GATES, BUFFERS AND INVERTERS LOW POWER tpcj = 20 ns Pd = 2 mW per Gate STANDARD tpd = 10 ns Pd = 10 mW per Gate 0°C to +70° C and -5 5 ° to +125°C 0° to +70° C -5 5 ° t o +125° C 9 L00 9N00/7400 9N00/5400 9N01/7401 9N01/5401 9N03/7403 9N03/5403

SN74LS02 function

Contextual Info: SN5402, SN54LS02, SN54S02, SN7402, SN74LS02, SN74S02 QUADRUPLE 2 INPUT POSITIVE-NOR GATES DECEMBER 1 9 8 3 -REVISED MARCH 1988 Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs SN 5402 . . . J

Scans-0048109

Contextual Info: REVISIONS DATE D E S C R IP T IO N LTR Add vendor 27014 for device type 012X. Changed limits for minimum recovery time reset inactive to clock. Changed symbol for minimum reset pulse width. Changed thermal resistance for case 2. A 10 FEB 87 APPROVED I'jt&dJL

ttl crystal oscillator using CIRCUIT DIAGRAM 7404

Abstract: ttl crystal oscillator using 7404 74121 application as pulse generator ZNA134J 2NA134J ZNA134 7493 logic diagram 1135l diagram of cctv camera ttl crystal oscillator using CIRCUIT DIAGRAM
Contextual Info: PLESSEY SEMICONDUCTORS 1SE D 7220S13 QQQTSTfc, T P LE S S E Y Semiconductors Z N A 134J CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard outputs. • Single 5 vo lt supply, fu lly TTL compatible.

ZNA134J

Abstract: application circuits of ic 74121 74121 full internal circuit diagram ZNA134 229FJ 7404 sl 74121
Contextual Info: PLESSEY S EM ICON DU CT OR S 1SE D 7220S13 QQQTSTfc, T P L E S S E Y Sem icon du ctors Z N A 1 3 4 J CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard outputs. • Single 5 vo lt supply, fu lly TTL compatible.

IC 7400 diagram and truth table

Contextual Info: m H A R R IS U i V HCS165MS S E M I C O N D U C T O R Radiation Hardened Inverting 8-Bit Parallel-lnput/Serial Output Shift Register December 1992 Pinouts Features • 3 Micron Radiation Hardened SOS CMOS 16 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T16, LEAD FINISH C

7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
Contextual Info: KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY CMOS SILOCON GATE ARRAY Th e KG10000 S e rie s is c o n sists o f s ilico n gate C M O S arrays w hose inte rco n n e ctio n are in itia lly u n s p e c ifie d , th e re fo re custom LSI is p ro ce sse d w ith o n ly one m ask ste p a cu sto m ize d m etal m ask a c c o rd ­

pin diagram of ic 7493

Abstract: ZNA134 ttl crystal oscillator using 7404 application circuits of ic 74123 application circuits of ic 74121 74121 application as pulse generator pin diagram of IC 74121 ttl crystal oscillator using CIRCUIT DIAGRAM 7404 logic diagram of ic 7493 LS 74121
Contextual Info: GEC P LES S EY ! S E M I C O N D U C T O R S 4- 1 0 ^ 0 9 3 ! 3104 1 0 ZN A134 CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard ou tp u ts. • Single 5 v o lt supply, fu lly TTL co m p atib le. •

Contextual Info: HA RR IS S E M I C O N D S E C T O R SflE D • M 3 G 2 S7 1 D G M 4 2 0 b TMT H I H A S HCS165MS fflîftfMSSS Radiation Hardened Inverting 8-Bit Parallel-lnput/Serial Output Shift Register December 1992 • 3 Micron Radiation Hardened SOS CMOS <<r 0 r - 4

54LS242

Abstract: 54LS243 M38510
Contextual Info: ± R E V IS IO N S DATE DESCRIPTION LTR Add LCC package. Convert to m ilita r y drawing. Change load resistance in table 1. Change code indent no. to 67268. C APPROVED 22 JULY 1987 REV PAGE REV STATUS OF PAGES REV C C C C C C C C C C C PAGES 1 2 4 6 8 10 11

SNJ54LS83AJ

Abstract: 54LS83A
Contextual Info: ± R E V IS IO N S D A TE D E S C R IP T IO N LTR Delete vendor, CAGES 18324, 07263, and 27014. Revise to m ilita ry drawing format. Add log ic diagram. Change tpH Ll» tPHL2> and tp|_H2Change Code Ident. No. to 67268. E APPROVED 23 Oct 1987 DEVICE 01 INACTIVE FOR NEW

54LS83A

Contextual Info: ± R E V IS IO N S D A TE D E S C R IP T IO N LTR Delete vendor, CAGES 18324, 07263, and 27014. Revise to m ilita ry drawing format. Add log ic diagram. Change tpH Ll» tPHL2> and tp|_H2Change Code Ident. No. to 67268. E APPROVED 23 Oct 1987 DEVICE 01 INACTIVE FOR NEW

54F243

Contextual Info: A R E V IS IO N S D A TE D E S C R IP T IO N LTR APPRO VED REV PAGE REV STATUS REV O F PAGES PAGES 10 EPAREÇL BY, Defense Electronics MILITARY DRAWING This drawing is available for use by J Supply Canter J CKED^ c KED-n BY ^ Dayton, Ohio m Original date of drawing: 13 MAY 1987

7402 NOR gate ic pin configuration

Abstract: 7402 RS flip flop pspice model gate driver 7407 ic configuration 7407 ic spice model AN1671 7400 spice model TRANSISTOR IC 566 vco pspice model list transistor Motorola ic 7400 series
Contextual Info: Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR APPLICATION NOTE Order this document by AN1671/D AN1671 MC145170 PSpice Modeling Kit Freescale Semiconductor, Inc. Prepared by: Onis Cogburn Device models and simulators such as PSpice can provide the circuit designer with a method of reducing the

5962-8765701gx

Abstract: 5962-8765701 BYY15 1590/BGAJC
Contextual Info: REVISIONS LTR DATE YR-MO-OA DESCRIPTION APPROVED REV SHEET REV SHEET REV STATUS OF SHEETS REV SHEET PMICN/A STANDARDIZED MILITARY DRAWING TH IS DRAW ING IS AVAILABLE FOR U SE B Y A LL DEPARTM ENTS A N D A G EN C IES O F THE DEPARTM ENT O F D EF EN SE A M S C N/A

SNJ54HC133J

Abstract: BEAJC CI 7402 54HC133
Contextual Info: DESC FORM 193 MAY 86 This Material Copyrighted By Its Respective Manufacturer 1. SCOPE 1.1 Scope. This drawing describes device requirements fo r class B m icro circu its in accordance with o Flfir-S T D -883, "Provisions fo r the use o f MIL-STD-883 in conjunction with compliant non-JAN

CI 7402

Abstract: 5962-87722012X 5962-8772201CX
Contextual Info: D IS TR IB U TIO N S TA TE M E N T A. Approved for public release; distribution is unlim ited. DESC FO R M 193 M A Y 86 This Material Copyrighted By Its Respective Manufacturer _ i _ 1. —

54HC154

Abstract: MM54HC154J
Contextual Info: D IS TR IB U TIO N S TA TE M E N T A. Approved for public release; distribution is unlim ited. DESC FORM 193 MAY 86 1. SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits In accordance with 1.2.1 of ffir-STO-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAil

Contextual Info: This Material Copyrighted By Its Respective Manufacturer ± 1. SCOPE 1.1 Scop* . This drawing describes device requirements fo r class 8 m icro circu its in accordance with 1 .2 .1 o fm - S T D -3 8 3 , "Provisions fo r the use o f MIL-STD-883 in conjunction with compliant non-JA*l