ICT 18CV8 Search Results

Contextual Info: Preliminary Data INTERNATIONAL CMOS TECHNOLOGY, INC. INTERNATIONAL C M O S 37E D H March 1991 4640707 0D0043T 1 IS ICT PEEL 22CV10A CMOS Programmable Electrically Erasable Logic Device Featu res ^ ^ ^ ~<^~7 Architectural Flexibility — 132 product term x 44 input AND array

Contextual Info: HÔM07Ü7 0Q003SD 7 M I C I 37E D INTERNATIONAL C M O S Product Preview INTERNATIONAL CMOS TECHNOLOGY, INC. T -4 6 -1 9 - o T PEEC18CV8-1 0/PEECm 18CV8-12 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility • 1-Micron CMOS EEPROM Technology

PEEL18CV815

Contextual Info: ET INC. PEEL 18CV8-15 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility • Industrial Grade Operation — — — Low Power Consumption — — CMOS:9C mA standby +0.5m A/M Hz max TTL: 105mA standby + 0.5mA/MHz max —

Contextual Info: S4E D 4ÖM0707 0001037 3t>2 « I C T I C T INC Preliminary Information INC. PEEL 18CV8L-15 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins — Independently programmable 12-con­

Contextual Info: INTERNATIONAL C M O S 37E D 4040707 0 0 0 0 3 3 e ö T-46-19-07 INTERNATIONAL CMOS TECHNOLOGY, INC. PEEL 18CV8 CMOS Programmable Electrically Erasable Logic Device Features A rchitectural F lexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins

ICT 18CV8

Abstract: 18CV8 PEEL18CV8P-15 ICT 20 PIN PLASTIC 300 MIL DIP programmer EPLD 18cv8 programming free circuit eeprom programmer PEEL18CV PEEL18CV8J-5 PEEL18CV8P-7
Contextual Info: Commercial/ Industrial PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available

ict peel 18cv8

Abstract: 18CV8 International CMOS Technology PEEL18CV8P-10 ICT Peel PEEL programming 18cv8 programming International CMOS Technology PEEL18CV8P-15 PEEL18CV8P-25 PEEL18CV8PI-25
Contextual Info: International CMOS Technology Commercial/ Industrial PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz

ICT 18CV8

Contextual Info: Commercial/ Industrial INC. PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options Architectural Flexibility - Vcc = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz

PEEL22V10AZ

Contextual Info: September 1994 Preliminary Commercial INC. TM . PEEL 22V10AZ -15/-25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power — Ice = 25p.A typical at standby — Icc = 3.5mA (typical) at 1MHz — tpD = 15ns and 25ns versions • Architectural Flexibility

18CV825

Contextual Info: ET , INC. PEEL 18CV8-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins — Independent configurable I/O macro cells — Synchronous preset, asynchronous clear

Contextual Info: Commercial/ Industrial INC. PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • - ■ Architectural Flexibility Multiple Speed Power, Temperature Options - Enhanced architecture fits in m ore logic - 74 product te rm s x 36 input AN D array

Contextual Info: INTERNATIONAL CMOS TECHNOLOGY, INC. PEEL. 18CV8 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins — Independent configurable I/O macro cells — Synchronous preset, asynchronous clear

22CV10AP

Abstract: 22cv10 nte quick cross ict peel 18CV8J palce programmer schematic blackjack vhdl code PA7140J-20 INTEL PLD910 PALCE610
Contextual Info: Data Book General Information PEEL Arrays PEEL Devices Special Products and Services Development Tools Application Notes and Reports Package Information PLACE Users Manual_ Introduction to PLACE PLACE Installation Getting Started with PLACE Operation Reference Guide

Contextual Info: Preliminary Commercial PEEL 18LV8Z-25 CMOS Programmable Electrically Erasable Logic Device FEATURES • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =25 uA typical at standby - Icc = 2 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)

Contextual Info: Preliminary Data INTERNATIONAL CMOS TECHNOLOGY, INC. March 1991 PEEL 22CV10A CMOS Programmable Electrically Erasable Logic Device Features • Advanced CMOS EEPROM Technology Architectural Flexibility — 132 product term x 44 input AND array — Up to 22 inputs and 10 outputs

Contextual Info: Preliminary Information PEEL 18CV8L-15 CMOS Programmable Electrically Erasable Logic Device Features • Industrial Grade Operation ■ Architectural Flexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins — Independently programmable 12-con­

Contextual Info: Preliminary Information PEEL 18CV8L-25 CMOS Programmable Electrically Erasable Logic Device Features • Advanced CMOS EEPROM Technology ■ High Performance — tPD = 25ns, fmax=33.3MHz ■ Architectural Flexibility — 74 product term x 36 input array

Contextual Info: Preliminary Information , INC. PEEL 18CV8-7 CMOS Programmable Electrically Erasable Logic Device Features • Architectural Flexibility ■ Advanced CMOS EEPROM Technology — — — 74 product term x 36 input array Up to 18 inputs and 8 I/O pins Independently programmable 12-con­

Contextual Info: , SME ] m MñMD7 G7 DD01034 bS 3 « K T I C T INC Preliminary Information , INC. PEEL 18CV8L-25 CMOS Programmable Electrically Erasable Logic Device Features • Architectural Flexibility ■ Advanced CMOS EEPROM Technology — 74 product term x 36 input array

Contextual Info: ET , INC. PEEL 18CV8-10 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility — 74 product term x 36 input array — Up to 18 inputs and 8 I/O pins — Independently programmable 12-con­ figuration I/O macro cells — Synchronous preset, asynchronous clear

18cv8z-25

Abstract: PEELTM18CV8Z PEEL18CV8ZJI PEEL18CV8ZJI-25
Contextual Info: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing

ICT 20 PIN PLASTIC 300 MIL DIP

Abstract: ICT PEEL18CV8ZP-25 18cv8z
Contextual Info: Commercial INC. PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 pA typical at standby - Ice = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology

ICT 18CV8Z

Abstract: ICT PEEL18CV8ZP-25 18CV8Z-25 16V8 18CV8 PAL16V8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZJI-25
Contextual Info: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing

Contextual Info: 37E J> INTERNATIONAL C M O S 40 40707 0000347 7 T-46-19-07 INTERNATIONAL CMOS TECHNOLOGY, INC. PEEL 18CV8-15/PEEL™18CV8-20 CMOS Programmable Electrically Erasable Logic Devic6 Features • Architectural Flexibility Advanced CMOS EEPROM Technology — —