KMM377S823BT1GL Search Results
KMM377S823BT1GL Datasheets Context Search
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Contextual Info: SDRAM MODULE Preliminary KMM377S823BT1 Revision History Revision 3 May 1998 - CLK Input Cap. is added by PLL Input Cap. (24pF) Revision 4 (July 1998) - "REGE" description is changed. Revision 5 (Aug. 1998) - Package Dimension changed. REV. 5 Aug. 1998 Preliminary |
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KMM377S823BT1 KMM377S823BT1 8Mx72 400mil 18-bits 100MHz 100MHz | |
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Contextual Info: SDRAM MODULE Preliminary KMM377S823BT1 Revision History Revision 3 May 1998 - CLK input Cap. is added by PLL Input Cap. (24pF) Revision 4 (July 1998) - "REGE" description is changed. REV. 4 July 1998 ELECTRG&HCS Preliminary KMM377S823BT1 SDRAM MODULE KMM377S823BT1 SDRAM DIMM (Intel 1.0 ver. Base) |
OCR Scan |
KMM377S823BT1 KMM377S823BT1 400mil 18-bits KM48S8030BT | |
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Contextual Info: SDRAM MODULE Preliminary KMM377S823BT1 Revision History Revision 3 May 1998 - CLK input Cap. is added by PLL Input Cap. (24pF) Revision 4 (July 1998) - "REGE" description is changed. REV. 4 July 1998 Preliminary KMM377S823BT1 SDRAM MODULE KMM377S823BT1 SDRAM DIMM (Intel 1.0 ver. Base) |
OCR Scan |
KMM377S823BT1 KMM377S823BT1 KMM377S823BT1-G8 125MHz 400mil KM48S8030BT | |
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Contextual Info: Preliminary KMM377S823BT1 SDRAM MODULE KMM377S823BT1 SDRAM DIMM Intel 1.0 ver. Base SMx72 SDRAM DIMM with PLL & Register based on 8Mx8,4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S823BT1 is a 8M bit x 72 Synchronous |
OCR Scan |
KMM377S823BT1 KMM377S823BT1 SMx72 400mi1 18-bits 168pin 0022uF | |
KMM377S823BT1GL
Abstract: KMM377S823BT1
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Original |
KMM377S823BT1 KMM377S823BT1 8Mx72 400mil 18-bits 168pin 0022uF KMM377S823BT1GL |