m8087 intel
Abstract: No abstract text available
Text: p R iy iM O B y w in te i M80C187 80-BIT NUMERIC PROCESSOR EXTENSION Military High Perform ance 80-Bit Internal Architecture Tw o to Three Tim es M8087 Perform ance at Equivalent Clock Speed Im plements A N S I/IE E E Standard 7541985 fo r Binary Floating-Point
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M80C187
80-BIT
M8087
M80387.
M80387
M80C186
80C18
m8087 intel
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D1515
Abstract: Q1515 80c196 instruction intel 80c196 opcode sheet MTO spco
Text: PftSUBflO INM V M80C196KB 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Military • 232 Byte Register File ■ Register-to-Register Architecture ■ 28 Interrupt Sources/16 Vectors ■ 2.3 us 16 x 16 Multiply 12 MHz ■ 4.0 us 32/16 Divide (12 MHz) ■ Powerdown and Idle Modes
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M80C196KB
16-BIT
Sources/16
68-Lead
10-Bit
D1515
Q1515
80c196 instruction
intel 80c196 opcode sheet
MTO spco
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F46C
Abstract: 272266 8XC196KT 8XC196KR intel OCR scan N87C196KT PX29 210997 0144S components quality and reliability
Text: in U . M B U H N JW 8XC196KT COMMERCIAL CHMOS MICROCONTROLLER High Performance CHMOS 16-Bit CPU O scillator Fail Detection C ircuitry Up to 32 Kbytes of On-Chip EPROM Up to 1 Kbyte o f On-Chip Register RAM High Speed Peripheral Transaction Server PTS Up to 512 Bytes o f Additional RAM
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8XC196KT
16-Bit
Channel/10-Bit
2bl75
8XC196KT
F46C
272266
8XC196KR
intel OCR scan
N87C196KT
PX29
210997
0144S
components quality and reliability
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Untitled
Abstract: No abstract text available
Text: in y CHAPTER 5 STANDARD AND PTS INTERRUPTS This chapter describes the interrupt control circuitry, priority scheme, and timing for standard and peripheral transaction server PTS interrupts. It discusses the three special interrupts and the sev en PTS modes, four of which are used with the EPA to provide a software serial I/O channel for
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l2bl75
8XC196MC,
A3277-01
01A3D2A
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Untitled
Abstract: No abstract text available
Text: 80960H A/H D/HT in te i 1.0 ABOUT THIS DOCUMENT This document describes the parametric perfor mance of Intel’s 80960Hx embedded superscalar microprocessors. Detailed descriptions for functional topics — other than parametric performance — are published in the i9 6 P H x M icroprocessor User’s
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80960H
80960Hx
32-bit
80960Hxâ
2bl75
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F46C
Abstract: 8XC196KR 8XC196KT N87C196KT PX29 272266 t20ir 196KT
Text: in U . M B U H N JW 8XC196KT COMMERCIAL CHMOS MICROCONTROLLER High Performance CHMOS 16-Bit CPU O scillator Fail Detection C ircuitry Up to 32 Kbytes of On-Chip EPROM Up to 1 Kbyte o f On-Chip Register RAM High Speed Peripheral Transaction Server PTS Up to 512 Bytes o f Additional RAM
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8XC196KT
16-Bit
Channel/10-Bit
2bl75
F46C
8XC196KR
N87C196KT
PX29
272266
t20ir
196KT
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