LPDA Search Results

ANSI C63.5

Abstract: Design a log periodic Antenna Antenna log periodic antenna balun LPDA-8003 dipole antenna Log-periodic antenna mobile antenna design Antenna log periodic dipole LPDA
Contextual Info: A Data Sheet ANTENNAS LPDA-8003 Log Periodic Dipole Antenna Product Overview The TDK RF Solutions LPDA-8003 Log Periodic Dipole Antenna is a new generation compact antenna used for transmitting and receiving broadband radio signals. It is especially suited for

fram programmer schematic

Abstract: slau101
Contextual Info: MSP430 Gang Programmer MSP-GANG430 User's Guide Literature Number: SLAU101Q March 2003 – Revised November 2011 2 SLAU101Q – March 2003 – Revised November 2011 Submit Documentation Feedback Copyright 2003–2011, Texas Instruments Incorporated Contents

AM 770 DENSITY TRANSMITTER

Abstract: T12xx 8829C
Contextual Info: DEVICE SPECIFICATION SO N E T /SD H /AT M OC-12 T R AN SM ITTER AND RECEIVER FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLL for clock generation and clock recovery • Supports 622.08 Mbit/s OC-12/STM-4

DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT

Abstract: PR11
Contextual Info: i Data Sheet I AT&T T7100A X.25 Protocol Controller Features • 5-MHz clock max ■ Triple-channel DMA with standard interface ■ 250-kb/s serial data rate (max) ■ Programmable retransmission counter (N2) ■ 8-bit data bus ■ 16-bit address bus ■ Password exchange mechanism for dial-up

TC59LM836DKB

Abstract: TC59LM836DKB-33
Contextual Info: TC59LM836DKB-33,-40 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 288Mbits Network FCRAM2 − 2,097,152-WORDS x 4 BANKS × 36-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM836DKB is Network

NAU8812

Abstract: AEC-Q100 TS16949 BTL POWER AMPLIFIER ic 4558 analog mems microphone NAU-8 microphone electret ecm 4f voltage of ic 4558 audio 0X049 mems mic
Contextual Info: NAU8812 Mono Audio Codec with Speaker Driver emPowerAudio 1. GENERAL DESCRIPTION The NAU8812 is a cost effective and low power wideband MONO audio CODEC. It is designed for voice telephony related applications. Functions include Automatic Level Control ALC with noise gate, PGA, standard audio interface

WAU8812

Abstract: AEC-Q100 TS16949 DAC FILTER 0X032
Contextual Info: Mono Audio Codec with Speaker Driver emPowerAudio 1. GENERAL DESCRIPTION The WAU8812 is a cost effective and low power wideband MONO audio CODEC. It is designed for voice telephony related applications. Functions include Automatic Level Control ALC with noise gate, PGA, standard audio interface

Contextual Info: PRELIMINARY DEVICE SPECIFICATION FIBRE CHANNEL INTERFACE CIRCUITS FEATURES • Functionally compliant with ANSI X3T9.3 Fibre Channel physical, transmission, and signaling protocol standards • Supports Fibre Channel data transmission rates of 1062.5, 531.25, and 265.625 Mbit/s

Contextual Info: K4C89093AF Target 288Mb Network-DRAM-II Specification Version 0.2 - 1 - REV. 0.2 Aug. 2003 K4C89093AF Target Revision History Version 0.0 Nov. 2002 - First Release Version 0.1 (Apr. 2003) - Added 800Mbps(400Mhz) product - Changed operating temperature from Ta to Tc.

DW0045-28

Abstract: MF-622DF-T12-XXX S3017 S3018 STM-16 STS-48 T12xx
Contextual Info: DEVICE SPECIFICATION SONET/SDH/ATM OC-12 TRANSMITTER AND RECEIVER BiCMOS PECL CLOCK SONET/SDH/ATM OC-12GENERATOR TRANSMITTER TRANSMITTER AND AND RECEIVER RECEIVER GENERAL DESCRIPTION FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLL for clock

Contextual Info: K4C89183AF 288Mb Network-DRAM-II Specification Version 0.11 - 1 - REV. 0.11 Apr. 2003 K4C89183AF Revision History Version 0.0 Oct. 2002 - First Release Version 0.01 (Nov. 2002) - Changed die revision from D-die to F-die - Corrected typo - Corrected DQS to DS and QS(DQS -> DS and QS) in AC timing table and timing diagram.

Q20P010

Abstract: Q20M100 carry look ahead adder Q20080 Q20P025 Q20025 vernier Q20000 Q20004 Q20010
Contextual Info: D EV IC E SP EC IFIC A TIO N LOGIC ARRAYS Q20000 “TURBO” ECL/TTL Q20000 FEATURES Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 10OK ECL and mixed ECL/TTL capability

lcd cross reference

Abstract: SH7707 cp09a Hitachi LCD 44100 conclusion of touch switch with 555 timer ML-2M-TB4N MAX254 PCMCIA SRAM Card CP09 SH7709
Contextual Info: Hitachi Confidential SH7709 WindowsCE Reference Platform PFM-DS3 Application Notes (Temporary Version) (Software volume) Hitachi Confidential Contents 1 PREFACE 3 TOUCH PANEL 3.1. PREFACE 3.1.1. Outline 3.1.2. Target Environment 3.2. DEVICE DRIVER INTERFACE (DDI) SPECIFICATIONS

1509-33

Abstract: cs3020 T12xx
Contextual Info: DEVICE SPECIFICATION AT M 622 MBI T/ S T R A N S M I T T E R A N D R E C E I V E R FEATURES • Complies with ANSI, Bellcore, an<l ITU-T specifications • On-chip high-frequency PLL for clock generationand clock recovery • Supports 622.08 Mbit/s OC-12/STM-4

Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

TLE4250

Abstract: AEP03717 GPO09662 TLE4997I
Contextual Info: _TLE4997I_Data_Sheet.book Page 1 Wednesday, August 22, 2007 12:59 PM Data Sheet, V 1.0, June 2007 T LE4 99 7I Programmable Linear Hall Sensor for Industrial Use Sensors N e v e r s t o p t h i n k i n g . _TLE4997I_Data_Sheet.book Page 2 Wednesday, August 22, 2007 12:59 PM

AUO-G1422.1U

Abstract: isl6247 quanta C1158 20/AUO-G1422.1U LM90 1b h 504 Socket AM2 quanta computer ot 409 w27 AO4413
Contextual Info: 1 2 3 4 5 6 7 8 PA1 BLOCK DIAGRAM NWD/PRESCOTT / SPRINGDALE AC/BATT CONNECTOR A CPU Thermal Sensor NWD/PRESCOTT PG 41 478 Pins BATT CHARGER Micro-FCPGA PG 41 Clocking CPU CORE DC/DC CK409 ISL6247 MAX1632 PG 4 PG 3 PG 4, 5 A PG 36 PG 39,40 Video RAM PG 14,15

LA2 DT2

Abstract: BGA64 TC59LM906AMG TC59LM914AMG P-BGA64-1317-1
Contextual Info: TC59LM914/06AMG-37,-50 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 512Mbits Network FCRAM1 SSTL_18 / HSTL_Interface − 4,194,304-WORDS x 8 BANKS × 16-BITS − 8,388,608-WORDS × 8 BANKS × 8-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM914/06AMG is Fast Cycle

TC59LM818DMBI

Abstract: VDDA14
Contextual Info: TC59LM818DMBI-37 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 288Mbits Network FCRAM2 I-version − 4,194,304-WORDS x 4 BANKS × 18-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM818DMBI is Network

FCC-801-M3-16A

Abstract: fcc-801 E9034A FCC-801-M3 NSG2070-1 IEC61000-4-11 IEC61000-4-3 IEC61000-4-4 IEC61000-4-6 IEC61000-4-8
Contextual Info: LS25 TEST DATA IEC61000 SERIES DWG. No PA580-58-01 APPD TDK-Lambda CHK DWG LS25 INDEX PAGE 1. Electrostatic Discharge Immunity Test IEC61000-4-2 …………………………………… R-1 2. Radiated Radio-Frequency Electromagnetic Field Immunity Test (IEC61000-4-3)………….

FCC-801-M3-16A

Abstract: FCC-801-M3 "Signal Generator"8648c IEC61000-4-11 IEC61000-4-4 IEC61000-4-6 IEC61000-4-8 LS-3551
Contextual Info: LS35 TEST DATA IEC61000 SERIES DWG. No. PA581-58-01 APPD TDK-Lambda CHK DWG LS35 INDEX PAGE 1. Electrostatic Discharge Immunity Test IEC61000-4-2 ……………………………. R-1 2. Radiated Radio-Frequency Electromagnetic Field Immunity Test (IEC61000-4-…………

TC59LM836DKB

Abstract: TC59LM836DKB-30
Contextual Info: TC59LM836DKB-30,-33,-40 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 288Mbits Network FCRAM2 − 2,097,152-WORDS x 4 BANKS × 36-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM836DKB is Network

BGA64

Abstract: TC59LM905AMB TC59LM913AMB
Contextual Info: TC59LM913/05AMB-50,-55 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 512Mbits Network FCRAM1 SSTL_2 Interface − 4,194,304-WORDS x 8 BANKS × 16-BITS − 8,388,608-WORDS × 8 BANKS × 8-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM913/05AMB is Network

S3021

Contextual Info: DEVICE SPECIFICATION ATM 622 MBIT/S TRANSMITTER AND RECEIVER BiCMOS PECL CLOCK SONET/SDH/ATM ATM 622 MBIT/S TRANSMITTER OC-12GENERATOR TRANSMITTER AND RECEIVER AND RECEIVER GENERAL DESCRIPTION FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications