M80C186EB Search Results

mg80c186

Abstract: 523ap order 231369 M801 80C186EB
Contextual Info: in te i M80C186EB-16, -13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • —55°C to + 125°C Operating Temperature Range • Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with

Contextual Info: M80C186EB ERRATA REVISION HISTORY The current stepping B step of the M 80C186EB has the following known functional anomaly. The first revision of this data sheet (271214-001) in­ dicated only 8 MH z and 13 M H z availability. The M 80C 186EB will also be available in a 16 M H z ver­

001100dw

Contextual Info: M80C186EB INSTRUCTION SET SUMMARY Clock C yd— Format Comments DATA TRANSFER MOV = Move: Register to Register/Memory 1 0 0 Q1 QOw mod reg r/m 2/12 Register/memory to register 1000101w mod reg r/m 2/9 Immediate to register/memory 1 10001 1w mod 000 r/m data

ocs4

Contextual Info: M80C186EB PACKAGE INFORMATION This section describes the pins, pinouts, and thermal characteristics for the M80C186EB PGA package. For complete package specifications and informa­ tion, see the Intel Packaging Outlines and Dimen­ sions Guide Order Number: 231369 .

MG80C186

Abstract: TRANSISTOR IFW 82 MG80C 27121 MG80C186EB
Contextual Info: M SM AGM &E O M F@ ^R M Y O M in te i M80C186EB-16, -13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • - 55°C to + 125°C Operating Temperature Range Integrated Feature Set — Low-Power Static CPU Core

Contextual Info: M80C186EB BUS CYCLE WAVEFORMS Figures 19 through 25 present the various bus cy­ cles that are generated by the M80C186EB. What is shown in the figure is the relationship of the various bus signals to CLKOUT. These figures along with the information present in AC Specifications allow

M80C188

Abstract: UPPER10 GCS2
Contextual Info: M80C186EB INTRODUCTION The M80C186EB is the first product in a new gener­ ation of low-power, high-integration microproces­ sors. It enhances the existing 186 family by offering new features and new operating modes. The M80C186EB is object code compatible with the

MG80C186

Abstract: MG80C186EB M80C186 80C186EB
Contextual Info: intei M80C186EB-16,-13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • -55°C to + 125°C Operating Temperature Range • Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with

Contextual Info: M80C186EB 88-LEAD CERAMIC PIN GRID ARRAY PACKAGE SEATINGPLANE A It il SEATING— H PLANE r=- e, 0 6 ALL PINS SWAGGED PIN DETAIL A,—* BASE — PLANE 271 214-33 Family: Ceramic Pin Grid Array Package Symbol Millimeters Inches Min Max Notes A 3.56 4.57 Ai

MG80C186EB

Abstract: mg80c186
Contextual Info: M80C186EB M80C186EB PINOUT Table 5 lists the M 8 0C 186E B pin names with package location for the 88-Lead Pin Grid Array PGA component. Figure 8 depicts the complete M 8 0C 186E B pinout as viewed from the bottom side of the component, Table 5. MG80C186EB Pin Assignm ents

Contextual Info: M80C186EB RESET The M80C186EB will perform a reset operation any time the RESIN pin active. The RESIN pin Is actually synchronized before it is presented internally, which means that the clock must be operating before a reset can take effect. From a power-on state, RESIN

Contextual Info: M80C186EB AC TEST CONDITIONS The AC specifications are tested with the 50 pF load shown in Figure 9. See the Derating Curves section to see how timings vary with load capacitance. Specifications are measured at the V cc/2 crossing point, unless otherwise specified. See AC Timing

MG80C186

Abstract: MG80C186EB M80C188 m80c187 M80C186EB-13 order 231369 M80C186EB-16 M80C186EB-8 AD947 MG80C
Contextual Info: M80C186EB-16 -13 -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR  Full Static Operation  True CMOS Inputs and Outputs  b55 C to a 125 C Operating Temperature Range Integrated Feature Set Low-Power Static CPU Core Two Independent UARTs each with an Integral Baud Rate Generator

AD1501

Contextual Info: M80C186EB in t e l AC SPECIFICATIONS A C Characteristic»— M80C186EB-16 Symbol Parameter Min Max Units Notes Frequency Period High Time Low Time Rise Time Fall Time 31.25 10 10 1 1 32 oo oo oo 8 8 MHz ns ns ns ns ns 1 1 1,2 1,2 1,3, 11 1, 3,11 CLKIN to C LKO U T Delay

A1816

Contextual Info: M80C186EB DC SPECIFICATIONS Max Units V|L Input Low Voltage -0 .5 0.3*Vcc V V|H Input High Voltage 0.7*Vcc Vcc + 0-5 V VOL Output Low Voltage 0.45 V Io l VOH Output High Voltage Vcc - 0.5 V Ioh = Vhyr Input Hysterisls on RESIN 0.50 V >LI1 Input Leakage Current for pins:

tc 2608

Contextual Info: M80C186EB ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Parameter Maximum Rating Storage Temperature . - 6 5 ° C to + 150°C Case Temp Under B ia s . - 55°C to + 125°C Supply Voltage with respect to V s s .- 0.5V to + 6.5V

Contextual Info: M80C186EB REGISTER BIT SUMMARY Figures 27 through 34 present the bit definition of each register that is active not reserved in the Pe­ ripheral Control Block (PCB). Each register can be thought to occupy one word (16-bits) of either mem­ ory or I/O space, although not all bits in the register

m8087 intel

Contextual Info: p R iy iM O B y w in te i M80C187 80-BIT NUMERIC PROCESSOR EXTENSION Military High Perform ance 80-Bit Internal Architecture Tw o to Three Tim es M8087 Perform ance at Equivalent Clock Speed Im plements A N S I/IE E E Standard 7541985 fo r Binary Floating-Point