MC31 FEATURES Search Results

ug384

Abstract: CQ 346 vhdl code for spartan 6 ternary content addressable memory VHDL SPARTAN 6 structure of clb MC31 SRL16 DPRAM DSP48A1
Contextual Info: Spartan-6 FPGA Configurable Logic Block User Guide UG384 v1.1 February 23, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the

SRLC32E

Abstract: SRL32 UG384 DPRAM32 CQ 346 spartan-6 XC6SLX45 cq 443 xc6slx75 DSP48A1 SRL16
Contextual Info: Spartan-6 FPGA Configurable Logic Block User GuideFPGA CLB Spartan-6 [optional] UG384 v1.0 June 24, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

RAM32M

Abstract: RAM64X1D SRLC32E RAM128X1D RAM256X1S SRL32 RAM64M ROM64x1 XC6VLX75T ROM256x1
Contextual Info: Virtex-6 FPGA Configurable Logic Block User Guide Virtex-6 FPGA CLB [optional] UG364 v1.1 September 16, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

virtex 6 XC6VSX475T

Abstract: XC6VLX75T shift register by using D flip-flop XC6VLX195T XC6VLX365T XC6VSX475T DSP48E DSP48E1 MC31 XC6VLX130T
Contextual Info: Virtex-6 FPGA Configurable Logic Block User Guide Virtex-6 FPGA CLB [optional] UG364 v1.0 June 24, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

XC7336

Abstract: XC7336Q mc35i PC44 XC7336-5 XC7336-15 X3339 36-Macrocell X5695 mc35
Contextual Info: XC7336/XC7336Q 36-Macrocell CMOS CPLD  June 1, 1996 Version 1.0 Product Specification Features General Description • The XC7336 is a high performance CPLD providing general purpose logic integration. It consists of four PAL-like 24V9 Fast Function Blocks interconnected by the 100%populated Universal Interconnect Matrix (UIM ). See

PC84

Abstract: PQ100 XC7372 XC7372-12
Contextual Info:  XC7372 72-Macrocell CMOS CPLD June 1, 1996 Version 1.0 Product Specification Features tion Blocks are turned off and unused macrocells in used Function Blocks are configured for low power operation. • • • • • • • • • • • • •

Project requires too many

Abstract: 82C55 DATA SHEET Altera 7032 atmel ATF2500 ATF1502 ATF1508 ATF8255N ATF1502AS shift11 16V8
Contextual Info: Atmel CPLD Reference Designs Prove Logic Doubling Works White Paper March 1, 2001 R is the registered trademark of Atmel Corporation, 2325 Orchard Parkway, San Jose, CA 95131 Rev. 2310A–03/01 Summary The first section of this paper describes the development of limitations in I/O connectivity

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor October 2007 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

XC7372

Contextual Info: HXILINX XC7372 72-Macrocell CMOS CPLD June 1 ,1 9 9 6 Version 1.0 Product Specification Features tion Blocks are turned off and unused m acrocells in used Function Blocks are configured for low power operation. • High-perform ance Com plex Program mable Logic

64PCS

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor March 2007 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

holt ic 6110

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor August 2008 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor February 2008 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

holt ic 6110

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor May 2008 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

str 765 RT

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor July 2006 GENERAL DESCRIPTION FEATURES The HI-6110 is a CMOS integrated circuit implementing the MIL-STD-1553 1553 data communications protocol between a host processor and a dual redundant 1553 data

Contextual Info: £ XC7372 72-Macrocell CMOS EPLD x ilin x Product Specifications Features connectivity between the Function Blocks. This allows logic functions to be mapped into the Function Blocks and interconnected without routing restrictions. • High-Performance EPLD

str 765 RT

Abstract: MIL-STD-1553-B holt ic 6110
Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor September 2006 GENERAL DESCRIPTION FEATURES The HI-6110 is a CMOS integrated circuit implementing the MIL-STD-1553 1553 data communications protocol between a host processor and a dual redundant 1553 data

str 765 RT

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor September 2006 GENERAL DESCRIPTION FEATURES The HI-6110 is a CMOS integrated circuit implementing the MIL-STD-1553 1553 data communications protocol between a host processor and a dual redundant 1553 data

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor October 2007 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store

str 765 RT

Abstract: MP 1008 es holt ic 6110 HI-6110 HI-6110PQI HI-6110PQT Holt 1553 Controller - HI6110
Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor November 2006 GENERAL DESCRIPTION FEATURES The HI-6110 is a CMOS integrated circuit implementing the MIL-STD-1553 1553 data communications protocol between a host processor and a dual redundant 1553 data

X5650

Abstract: X5767 XC7336Q PC44 XC7300 XC7336 XC7336-10
Contextual Info: XC7336 36-Macrocell CMOS EPLD  Product Specifications interconnected by the 100%-populated Universal Interconnect Matrix UIM . Features Ultra high-performance EPLD – 5 ns pin-to-pin speed on all fast inputs – 167 MHz maximum clock frequency Each Fast Function Block has 24 inputs and contains nine

XC7372

Contextual Info: £ XC7372 72-Macrocell CMOS EPLD XILINX Product Specifications connectivity between the Function Blocks. This allows logic functions to be mapped into the Function Blocks and interconnected without routing restrictions. Features • • H ig h -P erfo rm an c e E P L D

MC39I

Abstract: MC143 MC16 mc-14 MC119 MC151 FB13 XC73144 N649-I mc12
Contextual Info:  XC73144 144-Macrocell CMOS CPLD June 1, 1996 Version 1.0 Product Specification Features description. To minimize power dissipation, unused Function Blocks are turned off and unused macrocells in used Function Blocks are configured for low power operation.

MC3 117

Abstract: MC128 XC73108 mc103 10 pin MC124 MC116 MC92 mc11-6 PC84 PQ160
Contextual Info:  XC73108 108-Macrocell CMOS CPLD June 1, 1996 Version 1.0 Product Specification Features Macrocells can individually be specified for high performance or low power operation by adding attributes to the logic schematic, or declaration statements to the behavioral

holt ic 6110

Contextual Info: HI-6110 MIL-STD-1553 / MIL-STD-1760 BC / RT / MT Message Processor February 2009 FEATURES The HI-6110 may be configured as a Bus Controller BC , a Remote Terminal (RT), a Monitor Terminal (MT), or a Monitor Terminal with assigned RT address. 16-bit registers store