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    Signetics N74LS113N

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    Bristol Electronics N74LS113N 82
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    Quest Components () N74LS113N 944
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    N74LS113N 220
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    N74LS113N 75
    • 1 $15
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    N74LS113N 5
    • 1 $0.825
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    Texas Instruments SN74LS113N

    Peripheral ICs
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    Vyrian SN74LS113N 846
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    N74LS113N Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF PDF Size Page count
    N74LS113N
    		Signetics Dual J-K Edge-Triggered Flip-Flop Scan PDF 128.51KB 5
    N74LS113N
    		Signetics Dual J-K Edge Triggered Flip-Flop Scan PDF 133.69KB 5
    N74LS113N
    		Signetics Integrated Circuits Catalogue 1978/79 Scan PDF 920.04KB 27

    N74LS113N Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74LS113

    Abstract: C0056
    Contextual Info: 74LS113, S113 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION T h e '1 1 3 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, S e t and Clock inputs. Th e asynchro­ nous S e t Sq input, w hen LOW , forces


    OCR Scan     		74LS113, 1N916, 1N3064, 500ns 500ns 74LS113 C0056 PDF

    74LS113

    Abstract: 1N3064 1N916 74LS 74S113 N74LS113N N74S113N S113
    Contextual Info: 74LS113, S 'it e Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION T h e '1 1 3 is a dual J -K n e g a tive e dg e trig g e re d flip -flo p fe a tu rin g individ u a l J, K, S e t a n d C lo c k inp u ts. T h e a s y n c h ro ­


    OCR Scan     		74LS113, tr113, 1N916, 1N3064, 500ns 74LS113 1N3064 1N916 74LS 74S113 N74LS113N N74S113N S113 PDF

    74LS113

    Contextual Info: 74LS113, S113 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '113 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Set and Clock inputs. The asynchro­ nous Set S d input, w hen LOW, forces


    OCR Scan     		74LS113, 1N916, 1N3064, 500ns 500ns 74LS113 PDF

    74LS113

    Abstract: S113 equivalent
    Contextual Info: 74LS113, S113 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '113 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Set and Clock inputs. The asynchro­ nous Set Su input, when LOW, forces


    OCR Scan     		74LS113, WF08450S 1N916, 1N3064, 500ns 500ns 74LS113 S113 equivalent PDF

    THERMISTORS nsp 037

    Abstract: Thyristor TAG 9118 ICA 0726 0148 Transformer a1273 y k transistor AM97C11CN transistor SK A1104 PM7A2Q B8708 bzy79 yh 5032
    Contextual Info: INDEX OF COMPONENTS A Section/Page No. A.C. Adaptor. Adaptor Kits BNC e tc . Adhesive Tapes. Adhesives, Various. Aerosols.


    OCR Scan     		200X300X360m THERMISTORS nsp 037 Thyristor TAG 9118 ICA 0726 0148 Transformer a1273 y k transistor AM97C11CN transistor SK A1104 PM7A2Q B8708 bzy79 yh 5032 PDF

    transistor cross reference

    Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
    Contextual Info: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC


    OCR Scan     		PDF

    transistor C3866

    Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
    Contextual Info: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)


    Original     		PDF

    74LS113

    Abstract: 1N3064 1N916 74LS 74S113 N74LS113N N74S113N S113
    Contextual Info: 74LS113, S113 Signetics Flip-Flops Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION T h e '1 1 3 is a d u a l J -K n e g a tive edg e trig g e re d flip -flo p fe a tu rin g ind ivid u a l J, K, S e t and C lo c k inp u ts. T h e a s y n c h ro ­


    OCR Scan     		74LS113, 1N916, 1N3064, 500ns 74LS113 1N3064 1N916 74LS 74S113 N74LS113N N74S113N S113 PDF

    74LS113

    Contextual Info: 74LS113, S113 Flip-Flops S ig n e tics Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION TYPE T h e '1 1 3 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, S e t and Clock inputs. T h e asynchro­ nous S et Sp input, when LO W , forces


    OCR Scan     		74LS113, 500ns 500ns 1N916, 1N3064, 74LS113 PDF