OQ12 Search Results

Contextual Info: TOSHIBA THMY7280F1 BEG-80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The T H M Y 7 2 8 0 F 1 B E G is a 8,3 8 8 ,6 0 8 -w o rd by 7 2 -b it synchronous dynam ic RAM module consisting of

031-6169

Contextual Info: I = = = ¥ = IB M 0 3 1 6 4 y 9 z IB M 0 3 1 6 8 y 9 z IB M 0 3 1 6 1 6 9 z - y=0,B z=C,P,D,Q Preliminary

Contextual Info: n u N EW PRODUCT HB56G51236CC Series 524,288-WordX 36-Bit High Density Dynamic RAM Card 0H IT A C H 1 Rev.2 Ju n . 30,1992 Description The HB56G51236CC is a 512KX36 dynam ic RA M Card, mounted 4 pieces of 4M bit D RA M HM 514900LTT sealed in T S O P package.

Contextual Info: PRELIMINARY M IC R O N 256K WIDE DRAM X MT4C16260/1 16 WIDE DRAM 256K X 16 DRAM FEATURES • Industry-standard x l6 pinouts, timing, functions and packages • A ddress entry: ten row-addresses, eight columnaddresses • High-performance CMOS silicon-gate process

Contextual Info: ADVANCE MT4 L C1M16C3/5/6/7 S 1 MEG X 16 WIDE DRAM MICRON WIDE DRAM 1 MEG 16DRAM X 5.0V SELF REFRESH (MT4C1M16C3/5/6/7 S) 3.0/3.3V, SELF REFRESH (MT4LC1M16C3/5/6/7 S) FEATURES PIN ASSIGNMENT (Top View) OPTIONS • Timing 60ns access 70ns access 80ns access

Contextual Info: ADVANCED M IC R O N I MT58LC64K36B2 64Kx:36 SYNCBURST’* SRAM SYNCHRONOUS SRAM 64K x 36 SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS, BURST COUNTER FEATURES • • • • • • • • • • • • • • • PIN ASSIGNMENT Top View Fast access times: 9 ,1 0 ,1 1 ,1 2 and 14ns

Contextual Info: SAMSUNG ELECTRONICS INC b7E D 7 ^4 1 4 2 0 G1 S Ö 73 ‘t ë ô CMOS DRAM KM416C256A/AL/ALL 256Kx 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tRAC tcAc tRC 60ns 15ns 110ns KM416C256A/AÜALL-7 70ns 20ns 130ns

Contextual Info: ^ E D I EDI8F2465C B«ctronle D#$Jgn* In e ." High Speed 1.5 Megabit SRAM Module UDDM 64Kx24 Static RAM CMOS, High Speed Module Features The EDI8F2465C is a high speed 1.5 megabit Static RAM module organized as 64Kx24. This module is con­ structed from six 64Kx4 Static RAMs in SOJ packages on an

Contextual Info: ED/8F1664Ç m x 64KXK SRAM Module ELECTRON IC D E SIG N INC. 64Kx16StaticRAM C M O S 'M x M e Features TTieEDI8F1664C is a high speed 64Kx16CM0S Static RAM 64Kx16 bit CMOS Static Module consisting of four 4 32Kx8 CMOS Static RAMs. Random Access Memory Module

C2654

Contextual Info: ADVANCED M IC R O N I 128K TECHII01.00Ï. INC. X MT58LC128K36B2 36 SYNCBURST SRAM +3.3V SUPPLY, FLOW-THROUGH AND SELECTABLE BURST MODE FEATURES • • • • • • • • • • • • • • Fast access times: 9,10,11,12 and 14ns Fast OE access times; 5 and 6ns

Contextual Info: _ LT1313 TECHNOLOGY u m Dual PCMCIA VPP Driver/Regulator F€flTUR€S DCSCMPTIOn • Digital Selection of OV, Vcc, 12V or Hi-Z ■ Output Current Capability: 120mA ■ Internal Current Limiting and Thermal Shutdown ■ Automatic Switching from 3.3V to 5V

DS1514

Abstract: FR24 4320L
Contextual Info: S E M I C O N D U C T O R S M U 9C 4320L APPLICATION BENEFITS DISTINCTIVE CHARACTERISTICS > High performance VPI/VCI translation for ATM switches and routers, up to OC-48 > 4096 x 32-bit content-addressable memory CAM > Fully deterministic translation, independent

TMS44165

Contextual Info: TMS44165, TMS44165P 262144-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMHS166A-SEPTEMBER1991-REVISED DECEMBER 1992 Organization . . . 262 144 x 16 Single 5-V Supply ±10% Tolerance Performance Ranges: A C C E S S A C C E S S A C C E S S R EA D OR

Contextual Info: ADVANCE M IC R O N I ii^ n w r w MT16LD T 164(S) ! MEG x 64 DRAM MODULE 1 MEG x 64 DRAM 3.3V, OPTIONAL EXTENDED REFRESH, SELF REFRESH FEATURES • Industry-standard pinout in a 168-pin, dual read-out, single-in-line package • H igh-perform ance CMOS silicon-gate process

Contextual Info: ADVANCE MICRON I MT24LD T 472(S) 4 MEG X 72 DRAM MODULE SEMICONDUCTOR MC. 4 MEG x 72 DRAM 3.3V FAST PAGE MODE, OPTIONAL SELF REFRESH FEATURES • Industry-standard pinout in a 168-pin, dual read-out, single in-line package • High-performance CMOS silicon-gate process

ed 81

Contextual Info: M ir - n O fM I M T12D88C136 1 MEG x 36, 2 MEG x 18 IC DR AM CA R D IC DRAM CARD 4 MEGABYTES 1 MEG x 36, 2 MEG x 18 PIN ASSIGNMENT End View 88-Pin Card (U-1) M ARKING • Tim ing 60ns access 70ns access 80ns access -6 -7 -8 GENERAL D ESCRIPTIO N The M T12D88C136 is a 4 m egaby te, IC DR A M card

Contextual Info: PRELIMINARY MT28F400 256K x 16, 512K x 8 FLASH MEMORY |U 1I C = R C 3N FLASH MEMORY 256K x 16, 512K x 8 FEATURES PIN ASSIGNMENT Top View • Sev en erase blocks: - 1 6 K B /8 K -w o rd b oo t b lo ck (p rotected ) - T w o 8 K B /4 K -w o rd p aram eter b lo ck s

5285-04

Contextual Info: I =¥= =•= IBM0316409C IBM0316809C IBM0316169C IBM03164B9C P relim inary -80,-322 16M b S yn ch ro n o u s D R A M -D ie R evision D Features • Multiple Burst Read with Single Write Option • High Performance: i I fcK ! Clock Frequency -80 CL=3

HY5118160

Contextual Info: HYUNDAI HYM536223 X-Series 2M x 36-bit CMOS DRAM MODULE DESCRIPTION The HYM536223 is a 2M x 36-bit Fast page m ode CMOS DRAM m odule consisting o f fo u r HY5118160 in 42/42 pin SOJ o r 42/50 pin TSOPII and tw o HY514403B in 24/26 pin SOJ o r TSOPII on a 72 pin glass-epoxy printed circuit

Contextual Info: VG26V S 64(5)160B 4,194,304 x 16-Bit CMOS Dynamic RAM Preliminary Description The device is CMOS Dynamic RAM organized as 4,194,304 words x 16 bits with FAST PA G E access mode. It is fabricated with an advanced submicron CMOS technology and desinged to operate from a single 3.3V only power supply. It is packaged in JE D E C standard

3845 ic

Contextual Info: ^EDI EDI8F3265C ELECTRONIC DESIGNS INC. « High Speed Two Megabit SRAM Module 64Kx32 Static RAM CMOS, High Speed Module The EDI8F3265C is a high speed 2 megabit Static RAM module organized as 64Kx32. This module is constructed from eight 64Kx4 Static RAMs in SOJ packages on an

Contextual Info: EDI8F3232C W D I 32KX32 SRAM Module ELECTRONIC. DESIGNS, INC 32KX32Static RAM CHIOS, Hitfi Speed Module Features TTie EDI8F3232C is a high speed megabit Static RAM 32Kx32 bit CMOS Static module organized as 32Kx32. This module is constructed Random Access Memory

IT2205

Abstract: IBM0316809CT3-10 g618ac
Contextual Info: IBM0316409CIBM0316809C IBM0316169C 16Mbit S yn ch ro n o u s DRAM Features • High Performance: • Multiple Burst Read with Single Write Option CAS latency = 3 -10 -11 -12 -13 Units • Automatic and Controlled Precharge Command fcK Clock Frequency 100 91

Contextual Info: HY UN DA I 64K X HY6718100/101 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x 18 SRAM core, address registers, data input registers, a 2-bit burst address counter and pipelined output. All synchronous inputs pass through registers controlled by a positive-edge