S7C31 Search Results

IC ATA 2398

Contextual Info: Advance information •■ A S7C31024LL 3.3V 128K ■8 Intelliwatt " low powei CAAOS SRAM Features • • • • Intelliw att active pow er reduction circuitry 2.7 V to 3.6V operating range O rganization: 131,072 w ords X 8 bits H igh speed - 3 5 / 5 5 / 7 0 / 1 0 0 ns address access tim e

Contextual Info: H ig h P e r fo r m a n te 128KX8 C M O S SRAM A S7C31024LL mm II A 1 2 8 K X 8 In te lliw a tt lo w pow er CM O S SRAM Advance information Features > Easy m e m o ry e x p a n s io n w ith CE1, CE2, OE in p u ts • 2.7V to 3.6V o p e ra tin g ra n g e

AS7C1025

Abstract: AS7C31025
Contextual Info: H ig h P er fo r m a n c e L2 8 ? x 8 _ CMOS SRAM |a A S 7C 1 02 5 RI A S7C31025 @ 128K x8 CMOS SRAM Common I /O Preliminary information Features • Organization: 131, 072 words x 8 bits • H igh speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e

TMS320C6X

Abstract: DG014
Contextual Info: H igh p erfo rm an c e 4M b sy n ch ro n o u s CMOS SRAM S7C3128IC36P A S7C3128K32P h |l " _ 1 2 8 K X 3 2 / 3 6 pipeline burst synchronous SRAM Advance inform ation • • • • • • • • • • Organization: 131,072 words x 32 or 36 bits

256KX16

Abstract: 64KX16 AS7C1026 AS7C4098 AS7C513 T4347
Contextual Info: High Performance 128KX16 3.3V CMOS SRAM H A S7C3128K 16 A • O rganization: 131,072 w ords x 16 bits • 3.3V ±0.3 operation • H igh speed - 10 /1 2 /1 5 ns address access tim e - 5 /6 / 8 ns o u tp u t enable access tim e • Low p o w er consum p tion

intel 29F

Abstract: T7164 28F Intel LV6416 4c4007 5B810 32kxS 62832 dram cross reference T5C2568
Contextual Info: A Fast SRAM cross reference Vendor Cypress Hitachi Code ASCCode Description Code ASC Code CY 7C 185 A S7C 164 81x8 M C M 6264C AS7C164 8Kx8 CY 7C 199 A 57C 256 32K x8 M C M 6206D A S7C2S6 32K x8 C Y 7 C J3 9 9 A S7C 32S6 3 2 K * 8 3V M CM 62V06D A S7C 3256

Contextual Info: H ig h p e r f o r m a n c e 6 4 K X 16 C M O S SR AM A S7C 31026L L 6 4 K X 16 In telliw att low power CMOS SRAM Advance information • • • • • Optimized design for battery operated portable systems Intelliwatt™ active pow er reduction circuitry

7C1025

Contextual Info: AS7C1025 S7C31025 J l 5V/3.3V 128Kx8 CMOS SRAM Common I/O Features • O rganization: 1 3 1 ,0 7 2 w o rd s x 8 b i s • H jgh gpead - 1 0 / 1 2 / 1 5 / 2 0 nsad d ress access tin e - 3 / 3 / 4 / 5 n s o u tp u t enabie access tim. e • Low pow e rc o n s jm ption

Contextual Info: High Performance 128KX8 CMOS SRAM AS7C1024 S7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 ns output enable access time • Low power consumption

megatron

Abstract: 10N12 Beacon 406 MHz AS7C31024 BJ 919 26A41
Contextual Info: High Performance 128Kx8 3.3V CMOS SRAM H J 8 |j ^ S7C31024 S7C31024L PRELIMINARY _ Low Voltage 128Kx8 CMOS SRAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • Single 3.3 ±0.3V power supply

Contextual Info: A S7C 1025 A S 7C 31025 5 V /3 .3 V 1 2 8 K •8 C M O S SR A M iC o m n io n I/O Features • O rganization: 131,072 w ords X 8 bits • H igh speed - 1 0 /1 2 /1 5 / 2 0 ns address access tim e - 3 / 3 / 4 / 5 ns o utput enable access tim e • Low pow er consum ption

Contextual Info: A S 7 C 1 026 A S 7 C 3 1 026 A 5V/3.3V 6 4 K x 16 C M O S SRAM Features • O rganization: 6 5 ,5 3 6 w ord s X 16 bits • 4 4 -p in JEDEC standard package • H ig h speed - 4 0 0 m il SOJ - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 4 0 0 m il TSOP II

Contextual Info: Advance information Features • Organization: 131,072 words x 16 bits • 3.3V ±0.3 operation • H igh speed - 1 0 /1 2 /1 5 ns address access time - 5 / 6 / 8 ns output enable access time • Low pow er consum ption - Active: 5 0 4 m W max 15 ns cycle

Contextual Info: High Perform.iiK r » AS7CI0ZS A l28Kx8 H C M O S SRAM \S 7C î I 0 Z S I 2 K K * 8 C M O S S R A M Co mmo n i / 0 Prelim inary inform ation Features • O rganization: 131,072 w ords x 8 bits • H igh speed - 10/1 2 /1 5 /2 0 ns address access tim e

351N

Abstract: Pentium II Processor - Low Power
Contextual Info: Advance information •■ I l S7C3128K36P S7C3128K32P I 3.3V 12 8 K x 3 2 /3 6 pipeline burst synchronous SRAM Features • • • • • • • • • • O rg an izatio n : 1 3 1 ,0 7 2 w o rd s x 3 2 o r 3 6 bits Fast clock speeds to 166 M H z in LVTTL/LVCMOS

AS19F

Abstract: 29F2C F002T
Contextual Info: O rd e rin g in fo rm a tio n X Ordering inliirmiii um Asynchronous SRAM port numbering system Package type- P= P D IP I - SO I Voltage: SRAM Blank 5 = 5 V 'C M O S D ensity an d —3 ï V C M O S org an ization Po w e r L LL — L o w pow er Acct ss = V e ry lo w p o w e r

Contextual Info: H igh P erfo rm a n ce •■ A S 7 C 1024 H 128Kx8 CMOS SRAM A S7C 31024 1 2 8 K X 8 C M O S SRAM C o m m o n I / O • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h sp ee d

Contextual Info: AS7C1024 S7C31024 128Kx8 CMOS SRAM Common I/O family Features • O rganization: 1 3 1 ,0 7 2 w o rd s x 8 bits • H ig h speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 3 / 3 / 4 / 5 ns o u tp u t enable access tim e • Low p o w e r c o n su m p tio n available

Contextual Info: Il AS7C1024 AS7C1024L S7C31024 S7C31024L 128Kx8 CM OS SRAM Common I/O family Features • O rganization: 13 1 ,0 7 2 w o rd s x 8 bits • H igh speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 3 / 3 / 4 / 5 ns o u tp u t enable access tim e • Low p o w e r c o n su m p tio n available

Contextual Info: H igh Perform ance 128KX8 CMOS SRAM AS 7C1 0 2 4 A S7C 31024 1 2 8 K X 8 C M O S SRAM Features • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 3 2 - p i n JEDEC s ta n d a r d p a c k a g e s - 3 0 0 m il P D IP a n d SOJ

Contextual Info: Advance information S7C3128K 16 3.3V 128Kx16 CMOS SRAM Features • Organization: 131,072 w ords x 16 bits • 3.3V±0.3 operation • High speed - 1 0 /1 2 /1 5 ns address access time - 5 / 6 / 8 ns output enable access time • Low power consumption - Active: 504 m W max 15 ns cycle

64KX8

Abstract: AS7C1024 Plastic 32-pin 300 mil SOIC
Contextual Info: AS 7 C 1024 AS 7 C3 1024 llig li Perform ance 128KX8 CMOS SRAM 128KX8 CMOS' SRAM Features • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s X 8 b its • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 3 2 - p i n JEDEC s ta n d a r d p a c k a g e s

Contextual Info: H igh Performance 64K X16 CMOS SRAM AS7C1026 S7C31026 64K X I6 CMOS SRAM Preliminary information Features • Organization: 65,536 words x 16 bits • High speed - 1 2 /1 5 /2 0 /2 5 ns address access time - 6 /8 /1 0 /1 2 ns output enable access time • Low power consumption

S7C1024-20TJC

Abstract: 7C1024
Contextual Info: Features • O rg a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • T T L /L V T T L -com patible, th re e -s ta te I / O • H ig h s p e e d • 3 2 - p in JEDEC sta n d a rd p ackages - 3 0 0 m il PDIP a n d SOJ - 1 0 / 1 2 / 1 5 / 2 0 n s a d d re ss access tim e