SDRAM 4 BANK 4096 16 Search Results

hx 2272 DECODER

Abstract: sdram 4 bank 4096 16 HM5212165LTD-10 HM5212165TD-10 HM5212805LTD-10 HM5212805TD-10 Hitachi DSA00196
Contextual Info: HM5212165 Series HM5212805 Series 128M LVTTL interface SDRAM 66 MHz 2-Mword x 16-bit × 4-bank/4-Mword × 8-bit × 4-bank ADE-203-881B Z Rev. 1.0 Jul. 10, 1998 Description The Hitachi HM5212165 is a 128-Mbit SDRAM organized as 2097152-word × 16-bit × 4-bank. The Hitachi

HM5212805F-75A

Abstract: PC133-SDRAM Hitachi DSA00164 HM5212165F-75A
Contextual Info: HM5212165F-75A HM5212805F-75A 128M LVTTL interface SDRAM 133 MHz 2-Mword x 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133 SDRAM ADE-203-1049 Z Preliminary Rev. 0.0 May. 20, 1999 Description The Hitachi HM5212165F is a 128-Mbit SDRAM organized as 2097152-word × 16-bit × 4-bank. The Hitachi HM5212805F is a 128-Mbit SDRAM organized as 4194304-word × 8-bit × 4-bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.

P-TSOPII-54

Abstract: PC133 registered reference design
Contextual Info: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)

P-TSOPII-54

Abstract: caz smd PC133 registered reference design
Contextual Info: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10

Contextual Info: 64Mb: x4, x8, x16 SDRAM Features SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks Features Options • PC100- and PC133-compliant • Fully synchronous; all signals registered on positive

HM5264805LTT-B60

Abstract: HM5264805LTTB60 HM5264805TT-B60 Hitachi DSA00164
Contextual Info: HM5264165-B60 HM5264805-B60 HM5264405-B60 64M LVTTL interface SDRAM 100 MHz 1-Mword x 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/100 SDRAM ADE-203-832D Z Rev. 2.0 Oct. 20, 1998 Description The Hitachi HM5264165 is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The Hitachi

V54C3128

Contextual Info: V54C3128 16/80/40 4VE 128Mbit SDRAM 3.3 VOLT, TSOP II 8M X 16, 16M X 8, 32M X 4 6 7PC 7 System Frequency (fCK) 166 MHz 143 MHz 143 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns Clock Access Time (tAC2) CAS Latency = 2

HM5264165FTT-A60

Abstract: Hitachi DSA002745
Contextual Info: HM5264165F-75/A60/B60 HM5264805F-75/A60/B60 HM5264405F-75/A60/B60 64M LVTTL interface SDRAM 133 MHz/100 MHz 1-Mword x 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM ADE-203-940A Z Preliminary, Rev. 0.1 Dec. 28, 1998

HM5264165-B60

Abstract: HM5264805-B60 sdram 4 bank 4096 16 HM5264165 HM5264165TT-B60 Hitachi DSA00196
Contextual Info: HM5264165-B60 HM5264805-B60 HM5264405-B60 64M LVTTL interface SDRAM 100 MHz 1-Mword x 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/100 SDRAM ADE-203-832C Z Rev. 1.0 Jun. 25, 1998 Description The Hitachi HM5264165 is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The Hitachi

hm5264805ftt75

Abstract: Hitachi DSA00164
Contextual Info: HM5264165F-75/A60/B60 HM5264805F-75/A60/B60 HM5264405F-75/A60/B60 64M LVTTL interface SDRAM 133 MHz/100 MHz 1-Mword x 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM ADE-203-940B Z Rev. 1.0 Nov. 10, 1999 Description

V54C3128

Contextual Info: V54C3128 16/80/40 4VB*I 128Mbit SDRAM, INDUSTRIAL TEMPERATURE 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 System Frequency (fCK) 166 MHz 143 MHz 143 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns

V54C3128

Contextual Info: V54C3128 16/80/40 4VB*I 128Mbit SDRAM, INDUSTRIAL TEMPERATURE 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 System Frequency (fCK) 166 MHz 143 MHz 143 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns

5264805

Abstract: HM5264805 Series Hitachi DSA00164
Contextual Info: HM5264165 Series HM5264805 Series HM5264405 Series 64M LVTTL interface SDRAM 125 MHz/100 MHz 1-Mword x 16-bit × 4-bank/2-Mword × 8-bit × 4-bank/ 4-Mword × 4-bit × 4-bank ADE-203-497C Z Rev. 1.0 July 1, 1998 Description The Hitachi HM5264165 is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The Hitachi

V54C3128

Contextual Info: V54C3128 16/80/40 4VE 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 System Frequency (fCK) 166 MHz 143 MHz 143 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns Clock Access Time (tAC2) CAS Latency = 2

Contextual Info: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

54BALL

Abstract: V54C3128
Contextual Info: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

V54C3128

Contextual Info: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

Contextual Info: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

P-TSOPII-54

Abstract: 39s64160at-8
Contextual Info: HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns tCK2 10 12 15 ns tAC2 6 7 8 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature

V54C3128

Contextual Info: V54C3128 16/80/40 4VC 128Mbit SDRAM 3.3 VOLT, TSOP II / BGA PACKAGE 8M X 16, 16M X 8, 32M X 4 5 6 7PC 7 10 System Frequency (fCK) 200 MHz 166 MHz 143 MHz 143 MHz 100 MHz Clock Cycle Time (tCK3) 5 ns 6 ns 7 ns 7 ns 10 ns Clock Access Time (tAC3) CAS Latency = 3

Contextual Info: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

Contextual Info: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

V54C3128

Contextual Info: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns

V54C3128

Contextual Info: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns