YA13 Search Results

k0312

Abstract: yb06 YB04 YA16 apl 117 yb07 y802 AWa3 74N10 V18-Y3S
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY • 64 x 18 Bit W ide R egister File The Am29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined Data Path The Am 29C334 can be configured to support either a

Contextual Info: MULTISYNC ON-SCREEN DISPLAY FOR MONITOR • CMOS SINGLE CHIP OSD FOR MONITOR ■ BUILT IN 1 KBYTE RAM HOLDING : - PAGES’ DESCRIPTORS - CHARACTER CODES - USER DEFINABLE CHARACTERS ■ 128 ALPHANUMERIC CHARACTERS OR GRAPHIC SYMBOLS IN INTERNAL ROM 12 x 18 DOT MATRIX

D950

Abstract: D952 ST18952 Ya13 SCR SN 102 YBs 70 YA11
Contextual Info: ST18952 DIGITAL SIGNAL PROCESSOR DSP CHIP PRELIMINARY DATA • ■ ■ Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit ■ Fast and flexible buses ■ 66MIPS - 15 ns instruction cycle time 16.5 Kwords data memory (RAM)

PIR CONTROLLER LP 0001

Abstract: ED-9P PDCR 912 pdcr 921 23D31 D950 D950CORE ST18-AU1 dialnorm dynamic range dsei 17-12
Contextual Info: ST18-AU1 SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER PRELIMINARY DATA FEATURES • ■ ■ ■ Single chip multi-function audio decoder able to decompress DOLBY AC-3, MPEG-1 and MPEG-2 audio streams. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Emulation unit and TAP

vhdl code for 8-bit serial adder

Abstract: dse1 D950-CORE ieee floating point alu in vhdl vhdl code for 16 bit barrel shift register vhdl code for 8-bit adder
Contextual Info: D950-CORE 16-Bit Fixed Point Digital Signal Processor DSP Core • ■ ■ ■ ■ OUTPUT CLOCKS 16 XA-bus 16 YA-bus 16 CALCULATION 16 UNIT PROGRAM CONTROL UNIT 3 ID-bus 16 IA-bus 16 DATA MEMORY 6 ADDRESS PROGRAM MEMORY ■ UNIT VDD VSS ■ DATA CALCULATION

YB17

Abstract: A09 N03 yb04 b09 n03 GE H11 A10 K/1/64W am29c332
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit W ide R egister File The Am 29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined D ata Path The Am 29C 334 can be configured to support either a

lzl 24h

Abstract: pioneer PAL 007 A CNC DRIVES ford EEC V pioneer PEG 468 AM27S43 AM29300 am29325 Am29434 YA11
Contextual Info: a 32-Bit Microprosrammable Products Am29C300/29300 1 9 8 8 D ata B o o k Advanced Micro D e v ic e s a Advanced Micro Devices Am29C300/29300 Data Book 1988 Advanced Micro Devices Advanced Micro Devices reserves the right to make changes in its products without

vd950

Contextual Info: D950-CORE Preliminary Specification January 1995 This is Preliminary Data from SGS-THOMSON. Details are subject to change without notice. USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORISED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

Yb03

Abstract: Am29325 AWA3 D01136 AM2930 AM29323 AWA CAPACITOR yb16 C6113 YB02
Contextual Info: A m 29334 Four-Port D ual-Access Register File • • Fast W ith an access tim e o f 24 ns, the Am 29334 supports 80-90 ns m icrocycle tim e when used with the Am29300 Family for 32-bit systems. 64 x 18 Bits W ide R egister File The Am29334 is a high-performance, high-speed, dual­

Contextual Info: n = T S G S -IH O M S O N ">Ji» [MI»i[LiÊiniB R!lDÊê ST 18952 DIGITAL SIGNAL P R O C ESSO R DSP) CHIP P R ELIM IN A R Y DATA • Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit ■ Fast and flexible buses

9031a

Contextual Info: Am29334 Four-Port Dual-Access Register File • • • Fast With an access time of 24 ns, the Am29334 supports 80-90 ns microcycle time when used with the Am29300 Family for 32-bit systems. 64 x 18 B its Wide R egister File The Am29334 is a high-performance, high-speed, dual­

ya10

Abstract: YA-10 RB2A AM 29300 Family AM 29300 ALU
Contextual Info: Am29334 Four-Port D ual-Access Register File • • • Fast With an access tim e of 24 ns, the Am 29334 supports 80-90 ns rmcrocycle time when used with the Am29300 Family for 32-bit systems. 6 4 x 1 8 Bits W ide R egister File The Am 29334 is a high-perform ance, high-speed, dual­

YD317

Abstract: YC133 ZB6-Y009 YC128 YC219 YC311 YD340 yc424 YC317 YD31
Contextual Info: Control and Signaling Diameter 16mm XB6 / ZB6 Catalog February 2004 Control and signalling units Ø 16 General Harmony style 6 Pushbuttons, switches and pilot lights with double insulated bezel Description The Ø 16 range of double insulated control and signalling units comprises:

YA11

Abstract: 5N520 YA15 ya14 ya12 AWA3 Am29334 DA03 DA05 DA10
Contextual Info: Am29334 Four-Port Dual-Access Register File Fast W ith an access time of 24 ns, the Am 29334 supports 80-90 ns m icrocycle time when used with the Am29300 Family for 32-bit systems. 64 x 18 Bits W ide R egister File The Am 29334 is a high-performance, high-speed, dual­

8 bit barrel shifter vhdl code

Abstract: vhdl code for 8-bit serial adder D950-CORE vhdl code for SIGNED MULTIPLIER accumulator vhdl code for 8-bit adder Ya14
Contextual Info: D950-CORE 16-Bit Fixed Point Digital Signal Processor DSP Core • ■ ■ ■ ■ OUTPUT CLOCKS 6 16 XA-bus 16 YA-bus 16 CALCULATION 16 UNIT PROGRAM CONTROL UNIT 3 ID-bus 16 IA-bus 16 DATA MEMORY ADDRESS PROGRAM MEMORY ■ UNIT VDD VSS ■ DATA CALCULATION

Contextual Info: Am29434 ECL Four-Port, Dual-Access Register File PRELIMINARY DISTINCTIVE CHARACTERISTICS • • • Fast W ith an access time o f 20 ns, the Am 29434 supports 50-60 ns microcycle time w hen used with the Am 29400 Family for 32-bit systems. 6 4 x 1 8 Bits W ide R egister File

Contextual Info: r=Z SGS-THOMSON ST18952 DIGITAL SIGNAL P R O C E SSO R DSP CHIP PR E LIM IN A R Y DATA • Programmable D950 Core ■ Data calculation unit ■ Address calculation unit ■ Program control unit 16.5 Kwords data memory TAP ■ Fast and flexible buses ■ 66MIPS - 1 5 ns instruction cycle time

Contextual Info: SGS-THOMSON ilUHgüMMÊi D950-CQRE 16-Bit Fixed Point Digital Signal Processor DSP Core PRELIMINARY DATA P erform ance • 66 Mips - 15ns instruction cycle time M em ory O rgan izatio n ■ HARVARD architecture ■ Two 64k x 16-bit data memory spaces ■ One 64k x 16-bit program memory space

25C08C

Abstract: 4YA6 Am29400
Contextual Info: Am29434 ECL Four-Port, Dual-Access Register File PRELIMINARY DISTINCTIVE CHARACTERISTICS • Fast Simplified Timing Control With an access time o f 20 ns, the Am 29434 supports 50-60 ns m icrocycle time w hen used with the Am 29400 Family fo r 32-bit systems.

AWa3

Abstract: YA16 ya14 Am29434 Am29400 5N520 YA-10 L1232 yA10 YA11
Contextual Info: Am29434 ECL Four-Port, Dual-Access Register File PRELIMINARY DISTINCTIVE CHARACTERISTICS • Fast Simplified Timing Control With an access time of 20 ns, the Am29434 supports 50-60 ns microcycle time when used with the Am29400 Family for 32-bit systems. Control for write enable timing and for on-chip read/

Contextual Info: 晶 發 科 技 有 限 公 司 GI FAR TECHNOLOGY CO.,LTD No. 11, Lane 249, Sec. 2, Chung Shan Rd., Shulin City, Taipei Hsien, Taiwan, R.O.C. GIF SPECIFICATIONS Customer Sign GT02-SERIAL 2008.08.27 ROHS N ECH T AR CUSTOMER : SAMPLE CODE : DRAWIG NO. : DATE

ya11

Contextual Info: 晶 發 科 技 有 限 公 司 GI FAR TECHNOLOGY CO.,LTD No. 11, Lane 249, Sec. 2, Chung Shan Rd., Shulin City, Taipei Hsien, Taiwan, R.O.C. GIF SPECIFICATIONS Customer Sign GT01-SERIAL 2008.08.25 ROHS N ECH T AR CUSTOMER : SAMPLE CODE : DRAWIG NO. : DATE

39a132

Abstract: d950 BSU60 vhdl code lte vhdl code for SIGNED MULTIPLIER accumulator D950CORE D950-CORE 4 bit barrel shifter using mux YA11 vhdl code for 16 bit barrel shifter
Contextual Info: D950-CORE 16-BIT FIXED POINT DIGITAL SIGNAL PROCESSOR DSP CORE PRODUCT PREVIEW • ■ ■ ■ ■ ■ ADDRESS OUTPUT CLOCKS 6 16 XA-bus 16 CALCULATION 16 UNIT YA-bus PROGRAM CONTROL UNIT 16 3 ID-bus IA-bus 16 16 DATA MEMORY YD-bus XD-bus UNIT VDD VSS ■

t0440

Abstract: PIR CONTROLLER LP 0001 D950-DSP
Contextual Info: C T ^ 7 / S G S -T H O M S O N S T 1 8 -A U 1 SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER PRELIMINARY DATA FEATURES • Single chip multi-function audio decoder able to decompress DOLBY AC-3, MPEG-1 and MPEG-2 audio streams. ■ Maximum 5.1 channel DOLBY AC-3 decoding