02NOV2007 Search Results

02APR

Contextual Info: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:

DS1220

Abstract: M48Z02 M48Z12 24-Pin Plastic DIP
Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

M48Z35

Abstract: M48Z35Y SOH28 PCDIP28
Contextual Info: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultralow power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ 28 1 WRITE protect voltages:

M48Z35

Abstract: M48Z35Y SOH28
Contextual Info: M48Z35 M48Z35Y 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ 28 1 WRITE protect voltages:

Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

k 2608

Abstract: M48Z35 M48Z35Y SOH28
Contextual Info: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:

Contextual Info: T H I S DRAWING I S UNPUBLI SHED. COPYRI GHT LOC REL EAS E D FOR PUBL I CAT I ON ALL BY DI ST REVISIONS I NTERNATI ONAL RI GHTS RESERVED. LTR 2 \ DATE C ODE D E S C R I P T I ON C1 REVISED PER ECO-11-005030 MARK I NG- 26APR11 S I M CARD CENTER CONNECTOR

DS1220

Abstract: M48Z02 M48Z12
Contextual Info: M48Z02 M48Z12 5V, 16Kbit 2Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

Contextual Info: M48Z35 M48Z35Y 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ ■ WRITE protect voltages:

caphat

Abstract: DS1220 M48Z02 M48Z12
Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

AN1012

Abstract: M48Z32V
Contextual Info: M48Z32V 3.3V, 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, and powerfail control circuit ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:

AN1012

Abstract: M48Z32V
Contextual Info: M48Z32V 3.3V, 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, and powerfail control circuit ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:

DS1220

Abstract: M48Z02 M48Z12
Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection