54AS30 Search Results

74as30

Contextual Info: NATIONAL SENICOND NATIONAL DE| b S G H E S SEMICONDUCTOR 61C 51618 National Semiconductor DOSlblfl □ 7 - H ir tç 54AS30/DM74AS30 8 Input NAND Gate General Description Absolute Maximum Ratings Note d This device c o n ta in s a single gate w hich pe rform s the

Contextual Info: SN74AS305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER 0 3 5 9 6 , JU N E 1990 D OR N PACKAGE Maximum Output Skew of 1 ns T O P V IE W Maximum Pulse Skew of 1 ns u Q3 [ Center Pin and GND Configurations Minimize High-Speed Switching Noise Q 4[ 2 GND [ 3 GND [ 4

SN54ALS30A

Abstract: SN54AS30 SN74ALS30A SN74AS30 Y315
Contextual Info: SN74ALS30A. SN74AS30, SN54ALS30A, 54AS30 8-INPUT POSITIVE-NAND GATES M A R CH 1 9 8 4 - R E V IS E D M A Y 1986 SN 54A LS30A . SN 54A S30 J PACKAG E SN 74A LS30A , SN 74AS30 . D OR N PACKAGE Package Options Include Plastic "S m a ll O utline" Packages, Ceram ic Chip Carriers,

SN54ALS30A

Abstract: SN54AS30 SN74ALS30A SN74AS30
Contextual Info: O 'n - 'li ;• , ' ' SN54ALS30A, S N 54A S30, SN74ALS30A, SN 74A S30 8 INPUT POSITIVE-NAND GATES M A R C H 1 9 8 4 — R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 3 0 A , S N 5 4 A S 3 0 . . . J P AC KA G E S N 74ALS30A, S N 74A S 30 D OR N P AC KA G E P a c k a g e O p tio n s In c lu d e P la s tic " S m a ll

SN74ALS30

Abstract: 74as30 74ALS30
Contextual Info: TYPES SN54ALS30, 54AS30, SN74ALS30, SN74AS30 8-INPUT POSITIVE-NANO GATES D 2 6 6 1 , APRIL 1 9 8 2 - R E V IS E D D EC EM B ER 1 9 8 3 Pa ckage O p tion s Include Both Plastic and Ceram ic C h ip Carriers in A d d itio n to Plastic and C eram ic D IP s •

qml-38535

Abstract: GDFP1-F14
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A REV 1 SHEET 2 3 4 5 PREPARED BY Larry E. Shaw STANDARD MICROCIRCUIT DRAWING 6 7 8 9 10 11 12 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 CHECKED BY