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Cypress Semiconductor CY7C1420KV18-333BZI NO WARRANTY
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DigiKey	CY7C1420KV18-333BZI	Tray	420		1	1 $18.6 10 $18.6 100 $18.6 1000 $18.6 10000 $18.6	Buy Now
Verical	CY7C1420KV18-333BZI		161		7	1 - 10 $62.0625 100 $58.3375 1000 $52.75 10000 $52.75	Buy Now
	CY7C1420KV18-333BZI		66		7	1 - 10 $62.0625 100 $58.3375 1000 $52.75 10000 $52.75	Buy Now
Quest Components	CY7C1420KV18-333BZI		10			1 $42.508 10 $40.3826 100 $40.3826 1000 $40.3826 10000 $40.3826	Buy Now
Flip Electronics	CY7C1420KV18-333BZI		272			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Cypress Semiconductor CY7C1420KV18-300BZXC NO WARRANTY
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DigiKey	CY7C1420KV18-300BZXC	Tray	160		1	1 $16.75 10 $16.75 100 $16.75 1000 $16.75 10000 $16.75	Buy Now
Cypress Semiconductor CY7C1425KV18-250BZXC NO WARRANTY
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DigiKey	CY7C1425KV18-250BZXC	Tray	17		1	1 $15.44 10 $15.44 100 $15.44 1000 $15.44 10000 $15.44	Buy Now
Infineon Technologies AG CY7C1425KV18-250BZC IC SRAM 36MBIT PAR 165FBGA
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DigiKey	CY7C1425KV18-250BZC	Tray	3		1	1 $54.08 10 $54.08 100 $54.08 1000 $54.08 10000 $54.08	Buy Now
Avnet Americas	CY7C1425KV18-250BZC	Tray		0 Weeks, 2 Days	20	1 - 10 - 100 $35.224 1000 $34.188 10000 $34.188	Buy Now
	CY7C1425KV18-250BZC	Tray		11 Weeks	680	1 - 10 - 100 - 1000 - 10000 -	Get Quote
Mouser Electronics	CY7C1425KV18-250BZC					1 - 10 - 100 - 1000 $43.94 10000 $43.94	Get Quote
Flip Electronics	CY7C1425KV18-250BZC		5,643			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Infineon Technologies AG CY7C1423AV18-267BZC IC SRAM 36MBIT PAR 165FBGA
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DigiKey	CY7C1423AV18-267BZC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now

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CY7C142 Datasheets (205)

Part	Manufacturer	Description	Datasheet Type	PDF
CY7C142	Cypress Semiconductor	2Kx8 Dual-Port Static RAM	Original	PDF
CY7C142	Unknown	2Kx8 Dual-Port Static RAM	Original	PDF
CY7C1420AV18	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF
CY7C1420AV18-167BZXC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 167MHZ 165FBGA	Original	PDF
CY7C1420AV18-167BZXC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF
CY7C1420AV18-167BZXC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF
CY7C1420AV18-200BZC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 200MHZ 165FBGA	Original	PDF
CY7C1420AV18-200BZC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF
CY7C1420AV18-200BZCT	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 200MHZ 165FBGA	Original	PDF
CY7C1420AV18-200BZCT	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF
CY7C1420AV18-250BZC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 250MHZ 165FBGA	Original	PDF
CY7C1420AV18-250BZC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF
CY7C1420AV18-278BZC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF
CY7C1420BV18	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF

CY7C1420BV18-200BZC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 200MHZ 165FBGA	Original	PDF
CY7C1420BV18-200BZC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF
CY7C1420BV18-200BZCT	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 200MHZ 165FBGA	Original	PDF
CY7C1420BV18-250BZC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 36MBIT 250MHZ 165FBGA	Original	PDF
CY7C1420BV18-250BZC	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF
CY7C1420JV18	Cypress Semiconductor	36-Mbit DDR-II SRAM 2-Word Burst Architecture	Original	PDF

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CY7C142 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: CY7C1423KV18/CY7C1424KV18 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features Configurations • 36-Mbit density 2 M x 18, 1 M × 36 CY7C1423KV18 – 2 M × 18 ■ 333 MHz clock for high bandwidth	Original	PDF	CY7C1423KV18/CY7C1424KV18 36-Mbit CY7C1423KV18 CY7C1424KV18
CY7C132 Abstract: CY7C136 CY7C146 Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C132/CY7C136/CY7C142 and CY7C146 are high-speed CMOS 2K by 8 dual-port static RAMs. Two ports	Original	PDF	CY7C132/CY7C136 CY7C142/CY7C146 CY7C132/CY7C136/CY7C142 CY7C146 CY7C132/ CY7C136 16-bit CY7C132
CY7C1411BV18 Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 Text: CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 300 MHz clock for high bandwidth ■	Original	PDF	CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit CY7C1411BV18 CY7C1413BV18 CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18
CY7C1422AV18 Abstract: CY7C1423AV18 CY7C1424AV18 CY7C1429AV18 Text: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ 2-word burst for reducing address bus frequency	Original	PDF	CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 CY7C1429AV18
CY7C136-55NI Abstract: cy7c136 CY7C132 CY7C142 CY7C146 CY7C146-15NC CY7C136-25JXC CY7C136-55NC Text: CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 micron CMOS for optimum speed and power	Original	PDF	CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 CY7C136, CY7C136-55NI cy7c136 CY7C132 CY7C142 CY7C146 CY7C146-15NC CY7C136-25JXC CY7C136-55NC
CY7C1416AV18 Abstract: CY7C1418AV18 CY7C1420AV18 CY7C1427AV18 Text: CY7C1416AV18 CY7C1427AV18 CY7C1418AV18 CY7C1420AV18 PRELIMINARY 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 250-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency	Original	PDF	CY7C1416AV18 CY7C1427AV18 CY7C1418AV18 CY7C1420AV18 36-Mbit 250-MHz CY7C1416AV18 CY7C1418AV18 CY7C1420AV18 CY7C1427AV18
Untitled Abstract: No abstract text available Text: CY7C1411KV18/CY7C1426KV18 CY7C1413KV18/CY7C1415KV18 36-Mbit QDR II SRAM Four-Word Burst Architecture 36-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	CY7C1411KV18/CY7C1426KV18 CY7C1413KV18/CY7C1415KV18 36-Mbit CY7C1411KV18 CY7C1413KV18 CY7C1415KV18
Untitled Abstract: No abstract text available Text: CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency	Original	PDF	CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz
Untitled Abstract: No abstract text available Text: CY7C1422JV18, CY7C1429JV18 CY7C1423JV18, CY7C1424JV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36 Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ 2-word burst for reducing address bus frequency	Original	PDF	CY7C1422JV18, CY7C1429JV18 CY7C1423JV18, CY7C1424JV18 36-Mbit CY7C1429JV18, CY7C1424JV18
Untitled Abstract: No abstract text available Text: CY7C14161KV18, CY7C14271KV18 CY7C14181KV18, CY7C14201KV18 36-Mbit DDR II SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit Density 4M x 8, 4M x 9, 2M x 18, 1M x 36 ■ 333 MHz Clock for High Bandwidth ■ 2-word Burst for reducing Address Bus Frequency	Original	PDF	CY7C14161KV18, CY7C14271KV18 CY7C14181KV18, CY7C14201KV18 36-Mbit CY7C14271KV18, CY7C14201KV18
CY7C1428AV18-250BZC Abstract: No abstract text available Text: CY7C1417AV18 CY7C1428AV18 CY7C1419AV18 CY7C1421AV18 36-Mbit DDR-II SRAM 4-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 4-Word burst for reducing address bus frequency	Original	PDF	CY7C1417AV18 CY7C1428AV18 CY7C1419AV18 CY7C1421AV18 36-Mbit 300-MHz CY7C1428AV18-250BZC
Untitled Abstract: No abstract text available Text: CY7C1411KV18, CY7C1426KV18 CY7C1413KV18, CY7C1415KV18 36-Mbit QDR II SRAM 4-Word Burst Architecture 36-Mbit QDR® II SRAM 4-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	36-Mbit CY7C1411KV18, CY7C1426KV18 CY7C1413KV18, CY7C1415KV18 CY7C1411KV18 CY7C1426KV18 CY7C1413KV18
CY7C1416BV18 Abstract: CY7C1418BV18 CY7C1420BV18 CY7C1427BV18 Text: CY7C1416BV18 CY7C1427BV18 CY7C1418BV18 CY7C1420BV18 PRELIMINARY 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency	Original	PDF	CY7C1416BV18 CY7C1427BV18 CY7C1418BV18 CY7C1420BV18 36-Mbit 300-MHz enab1416BV18 CY7C1416BV18 CY7C1418BV18 CY7C1420BV18 CY7C1427BV18
CY7C1411BV18 Abstract: CY7C1413BV18 CY7C1415BV18 CY7C1426BV18 Text: CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit QDR -II SRAM 4-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 300 MHz clock for high bandwidth ■	Original	PDF	CY7C1411BV18, CY7C1426BV18 CY7C1413BV18, CY7C1415BV18 36-Mbit CY7C1411BV18 CY7C1413BV18 CY7C1411BV18 CY7C1413BV18 CY7C1415BV18 CY7C1426BV18

Untitled Abstract: No abstract text available Text: CY7C1418AV18 CY7C1420AV18 36 Mbit DDR II SRAM Two Word Burst Architecture Features Functional Description • 36 Mbit density 2M x 18, 1M x 36 ■ 300 MHz clock for high bandwidth ■ Two word burst for reducing address bus frequency ■ Double Data Rate (DDR) interfaces 	Original	PDF	CY7C1418AV18 CY7C1420AV18 CY7C1418AV18, CY7C1420AV18 CY7C1420AV18,
Untitled Abstract: No abstract text available Text: CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M × 9, 2M × 18, 1M × 36 ■ 300 MHz clock for high bandwidth	Original	PDF	CY7C1422AV18, CY7C1429AV18 CY7C1423AV18, CY7C1424AV18 36-Mbit CY7C1429AV18, CY7C1424AV18
CY7C136-55NI Abstract: CY7C146 idt7132 CY7C132 CY7C136 PC TO IDT7132 CY7C136-55NC Text: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns	Original	PDF	CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142) CY7C136-55NI CY7C146 idt7132 CY7C132 CY7C136 PC TO IDT7132 CY7C136-55NC
Untitled Abstract: No abstract text available Text: CY7C1418BV18 CY7C1420BV18 36-Mbit DDR II SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit Density 2M x 18, 1M x 36 ■ 267 MHz Clock for high Bandwidth ■ 2-word Burst for reducing Address Bus Frequency ■ Double Data Rate (DDR) Interfaces 	Original	PDF	CY7C1418BV18 CY7C1420BV18 36-Mbit CY7C1418BV18, CY7C1420BV18 CY7C1420BV18, 18-bit
Untitled Abstract: No abstract text available Text: CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 PRELIMINARY 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 36-Mbit density 4M x 8, 4M x 9, 2M x 18, 1M x 36 • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency	Original	PDF	CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit 300-MHz 600MHz) CY7C1429AV18
Untitled Abstract: No abstract text available Text: fax id: 5201 CY7C132/CY7C136 CY7C142/CY7C146 W CYPRESS 2Kx8 Dual-Port Static RAM Features Functional Description True Dual-Ported memory cells which allow sim ulta neous reads of the same mem ory location 2K x 8 organization 0.65-micron CMOS for optimum speed/power	OCR Scan	PDF	CY7C132/CY7C136 CY7C142/CY7C146 65-micron CY7C132/CY7C136 CY7C132/CY7C136; 52-pin 48-pin CY7C132/142)
Untitled Abstract: No abstract text available Text: CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR 2K x 8 Dual-Port Static RAM Features Functional Description • 0.8-raicron CMOS for optimum speed/power • BÜSŸ output flag on CY7C132/ CY7C136; BUSY input on CY7C142/CY7C146 The CY7C132/CY 7C136/CY7C142/	OCR Scan	PDF	CY7C132/CY7C136 CY7C142/CY7C146 CY7C132/ CY7C136; CY7C132/CY 7C136/CY7C142/ 7C146 7C136
Z1213 Abstract: CY7C132 CY7C136 CY7C146 zl12 Text: bSE » CYPRESS SEMICONDUCTOR SSÖ'lbbE 0 0 0 ^ 7 4 7 ISb I CYP CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR 2K x 8 Dual-Port Static RAM output enable OE . BUSY flags are pro vided on each port. In addition, an interrupt Functional Description Features	OCR Scan	PDF	CY7C132/CY7C136 CY7C142/CY7C146 CY7C142/CY7C146 CY7C132/ CY7C136; 52-pin CY7C132/CY7C136/CY7C142/ CY7C146 Z1213 CY7C132 CY7C136 zl12
C-136B Abstract: No abstract text available Text: CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS 2K x 8 Dual-Port Static RAM F ea tu res F u n ctio n al D escrip tio n • 0 .8 -m icro n C M O S for optim u m speed/ pow er • A u to m atic power-down • T T L com p atib le • C ap ab le o f w ith stan d in g g re a te r th an	OCR Scan	PDF	CY7C132/CY7C136 CY7C142/CY7C146 C-136B
30l3l Abstract: No abstract text available Text: CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR F eatures F unctional D escription • 0.8-micron CMOS for optimum speed/power • Automatic power-down • TTL compatible • Capable of withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation	OCR Scan	PDF	CY7C132/CY7C136 CY7C142/CY7C146 MASTERCY7CI32/CY7C136 CY7C132/ CY7C136; 52-pin CY7C142/CY7C146 30l3l

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CY7C142 Search Results

CY7C142 Price and Stock

Cypress Semiconductor CY7C1420KV18-333BZI

Cypress Semiconductor CY7C1420KV18-300BZXC

Cypress Semiconductor CY7C1425KV18-250BZXC

Infineon Technologies AG CY7C1425KV18-250BZC

Infineon Technologies AG CY7C1423AV18-267BZC

CY7C142 Datasheets (205)

CY7C142 Datasheets Context Search

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CY7C132

CY7C1411BV18

CY7C1422AV18

CY7C136-55NI

CY7C1416AV18

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CY7C1428AV18-250BZC

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CY7C1416BV18

CY7C1411BV18

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CY7C136-55NI

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Z1213

C-136B

30l3l