DS1040 Search Results

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.9, April 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture

Contextual Info: DS1040 Programmable One-Shot Pulse Generator DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • All-silicon pulse width generator IN H 1 8 : C 2 7 n P0 OUT Q 3 6 P1 gndC 4 5 □ □ o u t • Five program m able widths • Equal and unequal increm ents available

"pulse generator"

Abstract: Pulse generator circuit Q 371 Transistor three phase pulse generator 74LS DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250
Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator FEATURES PIN ASSIGNMENT • All-silicon pulse width generator • Five programmable widths • Equal and unequal increments available • Pulse widths from 5 ns to 500 ns 1 8 VCC 2 7 P0 OUT 3 6 P1 GND 4 5

Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator DALLAS SEMICONDUCTOR PIN ASSIGNMENT FEATURES • All-silicon pulse width generator C 1 8 öütH 2 7 : P0 OUTC 3 6 : P1 gndQ 4 5 : P2 IN • Five programmable widths • Equal and unequal increments available

LATTICE SEMICONDUCTOR Tape and Reel Specification

Abstract: LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm
Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.3, May 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture

Contextual Info: D S1040 DS1040 DALLAS SEMICONDUCTOR Programmable One-Shot Pulse Generator FEATURES PIN ASSIGNMENT All-silicon pulse width generator Five programmable widths 1Equal and unequal increments available X T -' IN C 1 8 J V CC OUT C 2 7 J PO OUT [[[ 3 6 gndC 4 5

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.6, September 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device

2BL4

Abstract: 74LS DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250 DS1040-75 DS1040H DS1040M
Contextual Info: DS1040 DALLAS Programmable One-Shot Pulse Generator SEMICONDUCTOR PIN ASSIGNMENT FEATURES • All-silicon pulse width generator IN C 1 8 C 2 7 OUT [ j 3 6 gndC 4 5 ö Dt • Five programmable widths • Equal and unequal increments available • Maximum pulse widths from 50 ns to 500 ns

Contextual Info: DS1040 DALLAS SEMICONDUCTOR FEATURES Programmable One-Shot Pulse Generator PIN ASSIGNMENT • A ll-s ilic o n p u ls e w id th g e n e ra to r IN C 1 8 C 2 7 o u t • Five p ro g ra m m a b le w id th s • Equal an d u n e q u a l in c re m e n ts a v a ila b le

Contextual Info: DS1040 n « i | DS1040 Programmable One-Shot SEMICONDUCTOR p u,se Generator FEA TU R E S PIN A S S IG N M E N T • A ll-s ilic o n p u ls e w id th g e n e ra to r • F ive p r o g r a m m a b le w id th s • E q u a l a n d u n e q u a l in c re m e n ts a v a ila b le

ICE40 lattice

Abstract: ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32
Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.2, April 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 3.0, July 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode

DS1669-100

Abstract: TQFP 100 pin Socket 4 pin dip switch DS2401 PACKAGE 16 pin DIP socket DS1804 NV 2 pin dip switch ds1232(ind) data sheet ds1642-150 DS1620S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC 14–Pin DIP

S1040

Contextual Info: D S 1040 DS1040 Programmable One-Shot Pulse Generator DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT ►All-silicon pulse width generator IN ►Five programmable widths ►Equal and unequal increments available \2 1 8 □ V cc OUT C 2 7 □ PO o u t Q 3 6 □

74LS

Abstract: DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250 DS1040-500 DS1040-75 DS1040M DS1040Z
Contextual Info: DS1040 Programmable One-Shot Pulse Generator www.dalsemi.com FEATURES PIN ASSIGNMENT All-silicon pulse width generator Five programmable widths Equal and unequal increments available Pulse widths from 5 ns to 500 ns Widths are stable and precise Rising edge-triggered

0034D

Abstract: 74LS DS1040 DS1040-100 DS1040-75 DS1040-A15 DS1040-B50 DS1040-D60 DS1040M DS1040Z
Contextual Info: ^ p%a I I DS1040 Programmable One-Shot Pulse Generator 19 www.dalsemi.com FEATURES IN C 1 OUT C 2 W 8 3 < o o PIN ASSIGNMENT All-silicon pulse width generator Five programmable widths Equal and unequal increments available Pulse widths from 5 ns to 500 ns

ic DS2430

Abstract: ds1205v DS1640
Contextual Info: M E C H A N IC A L D R A W IN G S 8 - TO 28-PIN DIP 300 MIL Includes: DS1000 DS1000M DS1003 DS1003M DS1004M DS1005 DS1005M DS1007 DS1010 DS1012M DS1013 DS1013M DS1020 DS1033M DS1035M DS1040M DS1044 DS1045 DS1200 DS1206 DS1210 8-PIN PKG 10-PIN 14-PIN 16-PIN

DS-1135

Abstract: DS1100 programmable delay DS1000 DS1004 DS1005 DS1007 DS1020 DS1033 DS1040
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS OSCILLATORS/DELAY LINES/TIMERS/COUNTERS Keywords: delay lines, silicon timed circuits, dealy lines, STCs, DS1040, DS1135L, DS1020, DS1045, DS1033, DS1044, DS1007, DS1000, DS1004, DS1005, DS1100, DS1100L, DS1010, DS1021, DS1013, DS1035,

Pulse generator circuit

Abstract: three phase pulse generator 74LS DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250 DS1040-500 DS1040-75
Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon pulse width generator IN C 1 • Five programmable widths ÖÜTÜ OUTE 2 • Equal and unequal increments available gnd C 4 • Pulse widths from 5 ns to 500 ns

Contextual Info: iCE40 LP/HX Family Data Sheet DS1040 Version 02.8, February 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode  Flexible Logic Architecture

74LS

Abstract: DS1040 DS1040-100 DS1040-150 DS1040-200 DS1040-250 DS1040-500 DS1040-75 DS1040M DS1040Z
Contextual Info: DS1040 DS1040 Programmable One-Shot Pulse Generator FEATURES PIN ASSIGNMENT • All-silicon pulse width generator • Five programmable widths • Equal and unequal increments available • Pulse widths from 5 ns to 500 ns 1 8 VCC 2 7 P0 OUT 3 6 P1 GND 4 5