NE33200 Search Results
NE33200 Datasheets (7)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | PDF Size | Page count | |
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NE33200 |
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SUPER LOW NOISE HJ FET | Original | 84.19KB | 7 | |||
NE33200 | Unknown | FET Data Book | Scan | 93.04KB | 2 | |||
NE33200 |
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SUPER LOW NOISE HJ FET | Scan | 420.45KB | 6 | |||
NE33200M |
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SUPER LOW NOISE HJ FET | Original | 84.19KB | 7 | |||
NE33200M |
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SUPER LOW NOISE HJ FET | Scan | 420.45KB | 6 | |||
NE33200N |
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SUPER LOW NOISE HJ FET | Original | 84.19KB | 7 | |||
NE33200N |
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SUPER LOW NOISE HJ FET | Scan | 420.45KB | 6 |
NE33200 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSO CIATED GAIN vs. FREQ UENCY V ds = 2 V, Ids = 10 mA • VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz • HIGH ASS O C IA TED GAIN: 10.5 dB Typical at 12 GHz • GATE LENGTH: 0.3 |im • GATE W ID TH : 280 nm |
OCR Scan |
NE33200 NE33200 NE33200N NE33200M lS22l | |
GM 90 562 573
Abstract: NE33200 NE33200M NE33200N
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Original |
NE33200 NE33200 24-Hour GM 90 562 573 NE33200M NE33200N | |
NE33200
Abstract: NE33200M NE33200N
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Original |
NE33200 NE33200 24-Hour NE33200M NE33200N | |
Contextual Info: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to |
Original |
NE33200 NE33200 24-Hour | |
NE67383Contextual Info: General Purpose GaAs FETs Typical Specifications @ T a = 25°C Pw t m a '4 m . I NEW^ Güw> |N EW *> I NEW > I N Ew V I NEW ^ »»a Vus Id s M ÊM mA (mA) p p fc M NE33200 NE67300 NE71300 NE76000 NE76100 0.3 0.3 0.3 0.3 1.0 280 280 280 280 400 0.1 0.1 0.1 |
OCR Scan |
NE33200 NE67300 NE71300 NE76000 NE76100 NE76083A NE33284A NE25118 NE25139 NE25339 NE67383 | |
Contextual Info: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA • GATE LENGTH: 0.3 µm • GATE WIDTH: 280 µm DESCRIPTION The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to |
Original |
NE33200 NE33200 24-Hour | |
Contextual Info: NONLINEAR MODEL NE33200 SCHEMATIC LG 0.19 RG CDG 0.16 0.04 GATE GGS 1E-5 RD 0.24 LD 0.2 DRAIN CGS 0.22 CDC 0.065 RDS g t f= 281GHz RI 0.52 CDS 0.05 RS 0.19 LS 0.03 SOURCE BIAS DEPENDENT MODEL PARAMETERS Parameters 2 V, 10 mA 2 V, 20 mA g 73 mS 96 mS t 2.5 pSec |
Original |
281GHz NE33200 24-Hour | |
NE33200
Abstract: LG 631 low noise, hetero junction fet NE33200M NE33200N sl2 357 sn 7441
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OCR Scan |
NE33200 NE33200 S12S21| 24-Hour LG 631 low noise, hetero junction fet NE33200M NE33200N sl2 357 sn 7441 | |
LAMBDA rs SERIES
Abstract: LAMBDA SEMICONDUCTORS 8E-14
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Original |
NE33200 4e-12 8e-14 05e-12 16e-12 24-Hour LAMBDA rs SERIES LAMBDA SEMICONDUCTORS | |
sn 7441Contextual Info: SUPER LOW NOISE HJ FET FEATURES NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY V d s = 2 V, Ids = 10 mA • VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz • HIGH ASSOCIATED GAIN: 10.5 dB Typical at 12 GHz <n • GATE LENGTH: 0.3 [im • GATE WIDTH: 280 urn |
OCR Scan |
NE33200 NE33200 IS2212 24-Hour sn 7441 | |
sn 7441Contextual Info: NEC SUPER LOW NOISE HJ FET FEATURES_ NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY • VERY LOW NOISE FIGURE: V ds = 2 V, Ids = 10 m A 0 75 dB typical at 12 GHz • HIGH ASSOCIATED GAIN: 10.5 dB Typical at 12 GHz • GATE LENGTH: 0.3 nm • GATE WIDTH: 280 |j.m |
OCR Scan |
NE33200 NE33200 NE33200N NE33200M IS221 sn 7441 | |
Contextual Info: SU PER LOW NOISE HJ FET FEATURES_ NE33200 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY Vd s = 2 V, Ids = 10 mA • VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz 4 - - -I- .1 1 - r 24 • HIGH ASSOCIATED GAIN: |
OCR Scan |
NE33200 NE33200 sur33200 NE33200N NE33200M 300nm IS12I IS22I2 IS12I | |
NE329Contextual Info: Low Noise GaAs FETs Typical Specifications @ Ta = 25°C Part |j| Hiigf g 8 NE24200 NE32400 NE33200 0.25 0.25 0.3 0.1 to 40 0.1 to 40 0.1 to 18 12 12 12 2.0 2.0 2.0 10 10 10 0.6 0.6 0.75 11.0 11.0 10.5 2.0 2.0 2.0 20 20 20 NE325S01 0.2 200 O.t to 14 12 2.0 |
OCR Scan |
NE24200 NE32400 NE33200 NE325S01 NE334S01 NE34018 NE425S01 NE434S01 NE24283B NE32484A NE329 | |
NE32184A
Abstract: Ku-BAND NEZ1011-4A nec x-band ne32684a hz nec NE42184A NE20248 NE24200 NE32084
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OCR Scan |
NE345L-10B NE345L-20B NE20248 NE24200 NE24283A NE32084 4/12GBz NE76038 4/12GHz NE76184A NE32184A Ku-BAND NEZ1011-4A nec x-band ne32684a hz nec NE42184A | |
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ne71084
Abstract: NE76084 NE71000 NE32684A NE67383 NE72000 NE32584 ne72089
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OCR Scan |
NE24200 NE32400 NE33200 NE67300 NE71000 NE76000 NE76100 NE24283B NE67383 NE71083 ne71084 NE76084 NE32684A NE72000 NE32584 ne72089 | |
ne71084
Abstract: GaAs MESFET NE25139 NE4200 NE32684A NE71000 71083 ne72089 NE72000 MESFET Application
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OCR Scan |
S3200 NE87300 NE76000 NE24283B ne71084 GaAs MESFET NE25139 NE4200 NE32684A NE71000 71083 ne72089 NE72000 MESFET Application | |
Curtice
Abstract: fet curtice nonlinear model fet curtice LAMBDA alpha 400 NE33200 FET model NE71300 Alpha 1000 GaAsFET pspice
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Original |
AN1023 sam13-106. Curtice fet curtice nonlinear model fet curtice LAMBDA alpha 400 NE33200 FET model NE71300 Alpha 1000 GaAsFET pspice | |
UAA 1006
Abstract: manual* cygnus sl 5000 transistor marking T79 ghz PC1658G NEC Ga FET marking code T79 gaas fet T79 pc1658 MC-7712 2SC5431 NEC U71
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Original |
D-40472 I-20124 I-00139 D-30177 GB-MK14 D-81925 S-18322 F-78142 E-28007 UAA 1006 manual* cygnus sl 5000 transistor marking T79 ghz PC1658G NEC Ga FET marking code T79 gaas fet T79 pc1658 MC-7712 2SC5431 NEC U71 | |
NE334S01
Abstract: E7138 nec microwave NE76084 NE67383
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OCR Scan |