ISC 9807 Search Results

Contextual Info: 4flLi3ö75 DOGObia Eä3 • IGC MRH SERIES DC-DC CONVERTER RADIATION HARDENED interpoint 10301 Willows Road P.O. Box 97005 Redmond, WA 98073-9705 TEL: 206 882-3100 TEL: 822-8782 FAX: 1206) 882-1990 • Up to 15 watts output power • Radiation hardened to operate through:

tico 732

Abstract: AMD socket s1 MACH110 MACH210 MACH215 PAL22V10 PAL22V16 mach 1 family amd
Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 MACH210A-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 44 Pins 64 Macrocells Peripheral Component Interconnect PCI

MACH210

Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 a IND: -12/14/18/24 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Peripheral Component Interconnect PCI

BP1148

Abstract: MACH111-20JC MACH110 MACH210 MACH215 PAL22V10
Contextual Info: FINAL COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 MACH111 Family High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 a Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ 7.5 ns tpD Commercial

16L8-5

Abstract: PAL16R8
Contextual Info: ADV MICRO P L A / P L E / A R R A Y S 2ÔE D G25752fci GG311Gb b AMD2 CO M 'L: -5/4 T—46—19—13 Z f Advanced Micro Devices PAL16R8-5/4 Series 5 ns TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 5 ns and 4.5 ns m axim um pro p a g a tio n delay

Contextual Info: FIN AL M A C H 1 1 1 COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 AM D£t F a m ily High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

Contextual Info: JU N 6 1991 COM’L: H-10 MIL: H-15 PALCE20V8H-10 EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all GAL 20V8/AS ■ Electrically erasable CMOS technology

gal 16v8 programming algorithm

Abstract: palce16v8 programming algorithm labpro PROGRAMMER circuit AMD palce16v8 programming 94056 PALCE* programming AMD PLD
Contextual Info: PAICE16V8H-10 PALCE20V8H-10 Advanced Micro Devices PALCE16V8H-10 Advanced Micro Devices EE CMOS 20-Pin High-Speed Universal Programmable Array L o gic_ DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all

O-81-4

Abstract: MACH211SP MACH110 MACH111SP PALCE22V10 MACH111SP-10JC PALCE* programming
Contextual Info: FINAL COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH111SP-5/7/10/12/15 High-Density EE CMOS Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ Programmable power-down mode

PPI-0223

Abstract: MACH130 PALCE22V10 Tag c0 665 800 MACH131sp
Contextual Info: PRELIMINARY COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH131SP-5/7/10/12/15 High-Density EE CMOS In-System Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-compatible, 5-V in-system programming

pal 007a

Abstract: MACH21D PAL 006A PAL 002a pal 005a MACH110 MACH210 MACH215 PAL22V10 PAL22V16
Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 M ACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 a Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Peripheral Component Interconnect PCI compliant

MACH120

Abstract: mach 3 family amd AMD Graphics schematics PAL26V12 mach 1 to 5 from amd mach 1 family amd teradyne lasar MACH220 PAL22V10 mach schematic
Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 Advanced Micro Devices MACH120-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 56 Inputs 48 Macrocells 48 Outputs 12 ns tPD Commercial 18 ns tPD Industrial 48 Flip-flops; 4 clock choices

MACHpro

Abstract: tico 732 MACH230 PAL22V10 MACH231SP20
Contextual Info: FINAL COM’L: -10/12/15/20 IND: -12/14/18/24 MACH231SP-10/12/15/20 High-Density EE CMOS In-System Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • ■ ■ ■ JTAG-Compatible, 5-V in-system programming 100 Pins 128 Macrocells 10-ns tPD Commercial

mach 3 family amd

Contextual Info: FINAL COM’L : -12/15/20 IN D :-18/24 a Advanced Micro Devices M A C H 1 2 0 - 1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 56 Inputs ■ 48 Macrocells ■ 48 Outputs ■ 12 ns tpD Commercial 18 ns tpD Industrial

mach schematic

Abstract: MACH211-7 teradyne lasar tico 732 MACH110 MACH210 MACH215 PAL22V10 MACH211-20JC
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 Advanced Micro Devices MACH211-7/10/12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 44 Pins Programmable power-down mode 64 Macrocells 32 Outputs 7.5 ns tPD Commercial 10 ns tPD Industrial

BP1148

Abstract: teradyne lasar tico 732 MACH210 MACH211SP PAL22V10 TEA 1020 sp
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 MACH211SP-7/10/12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ 44 Pins ■ 64 Macrocells ■ Peripheral Component Interconnect PCI

gg3b

Contextual Info: FINAL COM’L: -5/7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 11 -5 /7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tpD

Contextual Info: FINAL IND: -10/12/14/18/24 COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64Macrocells ■ Programmable power-down mode ■ 7.5 ns î p d Commercial

mach 3 family amd

Abstract: circuit diagram of QS 8005 PAL26V16 D750 MACH110 MACH210 MACH215 PAL22V10 mach 1 family amd NS4N
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Z I Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ Programmable power-down mode ■ 32 Outputs

Contextual Info: COM’L: -12/15/20,0-20/25 Advanced Micro Devices MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Flexible clocking ■ 128 Macrocells — Four global clock pins with selectable edges ■

mach435

Contextual Info: FIN A L COM’L: -12/15/20, Q-20/25 Advanced Micro Devices MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Flexible clocking ■ 84 Pins in PLCC ■ 128 Macrocells ■ — Four global clock pins with selectable edges

MACH435

Abstract: mach230 MACH130 PAL22V10 mach 1 family amd AMD MACH435
Contextual Info: FINAL COM’L: -12/15/20, Q-20/25 Advanced Micro Devices MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Flexible clocking ■ 128 Macrocells — Four global clock pins with selectable edges

PAL26V12

Abstract: mach schematic turpro-1 teradyne lasar MACH120 MACH220 PAL22V10
Contextual Info: FINAL COM’L: -10/12/15/20 IND: -14/18/24 Advanced Micro Devices MACH220-10/12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 48 Outputs 96 Macrocells 96 Flip-flops; 4 clock choices 10 ns tPD 8 “PAL26V12” blocks with buried macrocells