LH530800A Search Results

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

LH530800A

Abstract: 32DIP 32-PIN LH53
Contextual Info: LH530800A FEATURES • 131,072 words x 8 bit organization • Access time: 150 ns MAX. CMOS 1M (128K × 8) MROM PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 µW (MAX.) NC 1 32 Vcc A16 2 31

sharp mask rom

Contextual Info: LH530800A FEATURES CMOS 1M 128K x 8 MROM PIN CONNECTIONS • 131,072 words x 8 bit organization • Access time: 150 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW NCZ 1• s 32 □ Vcc A i aC 2 31 □ NC / • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 [iW (MAX.)

iz9a

Contextual Info: LH530800A-Y FEATURES CMOS 1M 128K x 8 3 V-Drive MROM PIN CONNECTIONS • 131,072 words x 8 bit organization • Access times: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V • Low-power consumption: Operating: 193 mW (MAX.) Standby: 550 (iW (MAX.)

Contextual Info: PRELIMINARY LH530800A-Y FEATURES • • C M O S 1M 128K x 8 M ask-Program m able ROM PIN CONNECTIONS 131,072 x 8 bit organization 32-PIN DIP 32-PIN SOP Access time: TOP VIEW / 1• S 32 □ Vcc 16C 2 31 □ NC A15C 3 30 □ NC 4 29 □ At A7r 5 28 □ A 13

32DIP

Abstract: 32-PIN LH530800A LH530800A-Y
Contextual Info: LH530800A-Y FEATURES CMOS 1M 128K x 8 3 V-Drive MROM PIN CONNECTIONS • 131,072 words × 8 bit organization • Access times: 500 ns (MAX.) at 2.6 V ≤ VCC < 4.5 V 150 ns (MAX.) at 4.5 V ≤ VCC ≤ 5.5 V • Low-power consumption: Operating: 193 mW (MAX.)

sharp mask rom

Abstract: mask rom 44-pin
Contextual Info: LH530800A I CMOS 1M 128K x 8 Mask Programmable ROM FEATURES • 131,072 x 8 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 193 mW (MAX.) Standby: 550 (iW (MAX.) • Fully static operation • TTL compatible I/O • 32-PIN DIP

lh5308

Contextual Info: LH530800A-Y PIN CONNECTIONS FEATURES • 131,072 words CMOS 1M 1 2 8 K - 8 3 V-Drive Mask-Programmable ROM x 8 bit organization • Access times: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V • Low-power consumption: Operating: 193 mW (MAX.)

C38N

Contextual Info: PRELIMINARY LH530800A-Y FEATURES CMOS 1M 128K x 8 M ask-P rogram m able ROM PIN CONNECTIONS • 131,072 x 8 bit organization • Access time: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V 32-PIN DIP • Fully-static operation

32DIP

Abstract: 32-PIN LH530800A LH530800A-Y
Contextual Info: LH530800A-Y FEATURES CMOS 1M 128K x 8 3 V-Drive Mask-Programmable ROM PIN CONNECTIONS • 131,072 words × 8 bit organization • Access times: 500 ns (MAX.) at 2.6 V ≤ VCC < 4.5 V 150 ns (MAX.) at 4.5 V ≤ VCC ≤ 5.5 V • Low-power consumption: Operating: 193 mW (MAX.)

32DIP

Abstract: 32-PIN LH530800A a7529 lh5308
Contextual Info: LH530800A CMOS 1M 128K x 8 Mask-Programmable ROM FEATURES • 131,072 words × 8 bit organization • Access time: 150 ns (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 µW (MAX.) NC

Contextual Info: LH530800A-Y FEATURES C M O S 1M 128K x 8 3 V-Drive M R O M PIN CONNECTIONS • 131,072 words x 8 bit organization 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V • Low-power consumption: Operating: 193 mW (MAX.) Standby: 550 jiW (MAX.) • Static operation • Three-state outputs

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

DIP-32P

Contextual Info: CMOS 1M 128K x 8 Mask-Programmable ROM FEATURES • 131,072 x 8 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 193 mW (MAX.) Standby: 550 (MAX.) PIN CONNECTIONS / • Fully static operation • TTL compatible I/O • •

sharp mask rom

Contextual Info: CM O S 1 M 1 2 8 K x 8 M R O M FEATURES PIN CONNECTIONS • 131,072 words x 8 bit organization • Access time: 150 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 (iW (MAX.) NCC 1• \ 32 A-^IZ A15Z

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

sharp mask rom 44-pin

Abstract: sharp lh53 D72120
Contextual Info: C M O S 1M 128K x 8 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 131,072 x 8 bit organization • Access time: 150 ns (MAX.) 32-PIN DIP • Power consumption: Operating: 193 mW (MAX.) Standby: 550 jiW (MAX.) • Fully-static operation • TTL compatible I/O

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

lh5s4

Abstract: LH-MN47XX lh5s4axx LH5359 LH5s lh5317 LH532CXX 32DIP
Contextual Info: MEMORIES • JEDEC Standard EPROM Pinout • Low voltage operation 3 V, 1.8 V Access time Bit Capacity configuration 1M 2M 4M Model No. LH53V1ROON/T LH53V2R00AN/AT LH53V2T00E LH53V2YOONÆ LH53V4T00E LH53V4R00AN/AT LH53V4Y00NÆ x 8 x 8 x 8 User’s No. Supply

Contextual Info: CMOS 1M 128K x 8 Mask-Programmable ROM PIN CONNECTIONS FEATURES • 131,072 words x 8 bit organization • Access time: 150 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW NCC 1• \ 32 □ Vcc A ig lZ 2 31 □ NC / • Power consumption: Operating: 192.5 mW (MAX.)

lh53

Contextual Info: CM O S 1M 128K x 8 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 131,072 • Access time: 150 ns (MAX.) • Power consumption: Operating: 193 mW (MAX.) Standby: 550 \i\N (MAX.) • Fully-static operation • TTL compatible I/O • Three-state outputs

FJ032-P-R450

Contextual Info: CMOS 1M 128K x 8 M ask-Program m able ROM FEATURES PIN CONNECTIONS • 131,072 words x 8 bit organization 32-PIN DIP 32-PIN SOP • Access time: 150 ns (MAX.) TOP VIEW N 32 I ] Vcc f ' • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 \x\N (MAX.)