LH5332A00A Search Results

42-PIN

Abstract: LH5332A00AD
Contextual Info: LH5332A00A CMOS 32M 2M x 16 Mask-Programmable ROM FEATURES • 2,097,152 words × 16 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs

LHMN5

Abstract: 48TSOP LH5332600 LH5332600N LH5332600T LH5332C00D TSOP048-P-1218 LH5332500 2sj au LHMV
Contextual Info: NBA/ INFORMATION LH5332600 • High-speed 32M-bit Mask-Programmable ROM Pin Connections Description The LH5332600N/T User's No. : LHMN56XX/LHMN5FXX is a CM OS 32M-bit mask-programmable ROM organized as 4 194 304X8 bits (Byte mode) or 2 097 152X 16 bits (Word

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

Contextual Info: CMOS 32M 2M x 16 MROM FEATURES PIN CONNECTIONS • 2,097,152 words x 16 bit organization 42-PIN DIP Standby: 550 (iW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply 1• Ai7 IZ 42 Zl a 2 41 ^ a8 A7 C

42-PIN

Abstract: A17C
Contextual Info: CMOS 32M 2M x 16 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 2,097,152 words x 16 bit organization 42-P!N DIP • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 jxW (MAX.) • Static operation • TTL compatible I/O

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

Contextual Info: CMOS 32M 2M x 16 MROM FEATURES PIN CONNECTIONS • 2,097,152 words x 16 bit organization 42-PIN DIP • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 jiW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs

Contextual Info: CMOS 32M 2M x 16 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 2,097,152 words x 16 bit organization S • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 (MAX.) • Static operation • TTL compatible I/O • Three-state outputs

GI9332

Abstract: mb831000 MB834000 23C2001 23C1001 23c1000 UPD23C1001 23c4001 HN62304 mb832000
Contextual Info: PROM/ROM index and cross reference 1.9 Jan 16, 2000 -Fujitsu 256K 32k x 8 MB83256 28 pin 512k 64k x 8 MB83512 (28 pin) 1M 128k x 8 MB831000 (32 pin) 2M 256k x 8 MB832000 (32 pin) 4M 256k x 16 / 512k x 8

LHMN5

Abstract: sharp mask rom 44-pin LH5332600N 2MX16 LH5332600 LH5332600T LH5332C00D LH535
Contextual Info: LH5332600 • Description High-speed 32M-bit Mask-Programmable ROM Pin Connections . The LH5332600N/T User’s No. : LHMN56XX/LHMN5FXX is a CMOS 32M-bit mask-programmable ROM organized as 4 194 3 0 4 X 8 bits (Byte mode) or 2 097 152 X 16 bits (Word mode) that can be selected by BYTE input pin.