LH534600 Search Results

MB8316200

Abstract: uPD23C4000S TC533200 23C4000C UPD23C4000 23C32000a 624116 HN62318/338B
Contextual Info: MEMORY ICS FUNCTION GUIDE 3. CROSS REFERENCE GUIDE Density 4M bit 8M bit Samsung NEC Hitachi Sharp Toshiba Fujitsu K M 23C4000C UPD23C4001EB HN62344B LH534700 TC534000C M B834000A K M 23C4100C UPD23C4000S HN62444 LH534600B TC534200C M B834200A K M 23C 4; OOCET UPD23C4000S

dl321

Contextual Info: LH534600 FEATURES • CMOS 4M 512K x 8 / 256K x 16 Mask-Programmable ROM DESCRIPTION 524,288 x 8 bit organization (Byte mode) 262,144 x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access time: 100 ns (MAX.) • Low-power consumption:

48-PIN

Abstract: d1220
Contextual Info: LH534600B FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words × 16 bit organization (Word mode) CMOS 4M (512K × 8/256K × 16) Mask-Programmable ROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW A17 1 40 A8 A7 2 39 A9 • BYTE input pin selects bit configuration

Contextual Info: LH534600B CMOS 4M 512K x 8/256K x 16 MROM FEATURES PIN CONNECTIONS • 524,288 words x 8 bit organization (Byte mode) 262,144 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access time: 100 ns (MAX.) • Power consumption:

Contextual Info: LH534600B CMOS 4M 512K x 8/256K x 16 MROM FEATURES PIN CONNECTIONS • 524,288 words x 8 bit organization (Byte mode) 262,144 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access time: 100 ns (MAX.) • Power consumption:

Contextual Info: CMOS 4M 512K x 8 / 256K x 16 Mask-Programmable ROM LH534600 FEATURES • 524,288 x 8 bit organization (Byte mode) 262,144 x 16 bit organization (Word mode) • • BYTE input pin selects bit configuration DESCRIPTION The LH534600 is a 4M bit mask-programmable ROM

Contextual Info: LH534600B FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration CMOS 4M (512K x 8/256K x 16) Mask-Programmable ROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP T O P VIEW

sharp mask rom

Abstract: sharp mask rom 44-pin
Contextual Info: LH534600 / FEATURES • 524,288 x 8 bit organization Byte mode 262,144 x 16 bit organization (Word mode) • • • BYTE input pin selects bit configuration CMOS 4M (512K x 8 / 256K x 16) Mask Programmable ROM DESCRIPTION The LH534600 is a 4M bit mask programmable ROM

cd rom 40 pinout

Abstract: ICE ICC3 LH534600AD-10
Contextual Info: LH534600A C M O S 4 M 5 1 2 K x 8 /2 5 6 K M a s k -P r o g r a m m a b le x 1 6 R O M FEATURES DESCRIPTION • 524,288 x 8 bit organization (Byte mode) 262,144 x 16 bit organization (Word mode) The LH534600A is a 4M bit mask-programmable ROM with two programmable memory organizations of

lh5s4

Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

lh5s4

Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Contextual Info: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.

lh5348

Abstract: lh5s4 48TSO
Contextual Info: ü fi LH53V4R00 LH53V4R00-2 • Description ■ Pin Connect for T h e L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U ser's N o . : L H 5V 4R X X is a CM OS 4 M -b it m ask-program m able ROM 32-pin SOP organized as 524 288 X 8 bits. It provides a high-speed access time o f 120/150 ns with low

lh5348

Abstract: TSOP032-P-0820 lh5s4 flash memory sop 32-pin lh5348xx lh5s47xx
Contextual Info: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Description Pin Connection T he L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U s e r's N o. : LH5V4RXX is a CM O S 4M -bit m ask-program m able ROM

MB834000

Abstract: M5M23160 MB834100 MB838000 MB832000 SGS M27C256 I27C256 KM23C1010 M27C256 M27C256 intel
Contextual Info: CROSS-REFERENCE GUIDE 1. EPROM CAPACITY CONFIGRUATION MACRONIX INTEL AMD N.S. S.G.S. 256K 32K x 8 MX27C256 i27C256 Am27C256 NM27C256 M27C256 512K 64K x 8 MX27C512 i27C512 Am27C512 NM27C512 M27C512 32K x 16 MX27C516 128K x 8 MX27C1000 i27C010 Am27C010 NM27C010

lh5s4

Abstract: lh5348 sharp lh53 lh5s47xx LH5S47 60446 sharp mask rom LH53V4R00N LH5H41XX TSOP032-P-0820
Contextual Info: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Description Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Pin Connection The L H 53V 4R 00N /T , L H 53V 4 R 0 0 N /T -2 U ser’s N o. : LH5V4RXX is a CMOS 4M -bit mask-programmable ROM 32-pin SOP

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

Contextual Info: MEMORIES ★ Capacity Configuration * 1 C om patible with 4 M -bit flash m em ories from A d vanced M icro D evices, Inc. * 2 C om patible with 4 M -bit flash m em ories from Intel Corp. A c c e s s tim e Under development MEMORIES ★ Under development Access time

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

lh5s4

Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
Contextual Info: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080