LTPR Search Results

mitac

Abstract: mitac 6120
Contextual Info: 1 2 3 4 5 6 7 8 6120 Mother BD Page 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. A Description Comments Title CPU Celeron Socket 370 North Bridge 443BX SO-DIMM On Board SDRAM Synthesizer PIIX4 IDE & FDD conn VGA ATi Rage LTpro

CSB503F30

Abstract: TA8845BN V700
Contextual Info: TOSHIBA TA8845BN TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC TA8845BN BUS CONTROL VIDEO, CHROMA, AND SYNC. SIGNAL PROCESSING IC FOR TV The TA8845BN has various function to be controlled via l2C bus as shown by a table of bus control map in

ltsx e3

Abstract: ltsx e3 PM7329 SCR SS 3328 LTSX LTCE epd 47- 50 2LW MARKING CODE wrr AND I.610 0X00 PM7329
Contextual Info: PM7329 S/UNI-APEX-1K800 DATASHEET PMC-2010141 ISSUE 2 ATM TRAFFIC MANAGER AND SWITCH PM7329 TM S/UNI - APEX-1k800 S/UNI-APEX-1K800 ATM/PACKET TRAFFIC MANAGER AND SWITCH DATASHEET ISSUE 2: JUNE, 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

LT1962 ADJ

Abstract: LTPQ LT1772 LT1962-3.3 LT1962EMS8-1.5 ltpr LT1962 LT1962-3 LT1962-5 sot-223 g51
Contextual Info: LT1962 Series 300mA, Low Noise, Micropower LDO Regulators U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Low Noise: 20µVRMS 10Hz to 100kHz Output Current: 300mA Low Quiescent Current: 30µA Wide Input Voltage Range: 1.8V to 20V

014400m

Contextual Info: IBM014400M IBM014400P 1M x 4 Low Power DRAM Features • 1,048,576 word by 4 bit organization • Power Supply: 3.3 ± 0.3V or 5.0 ± 0.5V • 1024 Refresh Cycle Rate/128m s Low Power Dissipation - Active max - 85m A/70m A (5.0V) - 95m A/80m A (3.3V) - Standby (TTL Inputs) - 1 ,0mA (max)

Contextual Info: LT1962 Series 300mA, Low Noise, Micropower LDO Regulators FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO Low Noise: 20µVRMS 10Hz to 100kHz Output Current: 300mA Low Quiescent Current: 30µA Wide Input Voltage Range: 1.8V to 20V

Contextual Info: fa io ftk SI T it le r a d ia l i ! TECHNICAL DATA SHEET Fibre Optic Conponents F 715 710 000 DUPLEX ADAPTOR 9.4mm D im en sion s S e r ie s EC : mm Is s u e : 06 19 97 Page 1/1 39 MAXI 19 MAXI 2 hole s dia 2 . 4 MAX 14.9 MAXI Z| Î “-H i t ;< 4 CAPS PANEL MOUNT

ltsx e3

Abstract: ltsx SCR SS 3328 ATLAS DSLAM structure wrr AND I.610 0X00 PM7326 MB 14231 package marking 3LW ON
Contextual Info: PM7326 S/UNI APEX DATA SHEET PMC-1981224 ISSUE 6 ATM/PACKET TRAFFIC MANAGER AND SWITCH PM7326 TM S/UNI - APEX S/UNI APEX ATM/PACKET TRAFFIC MANAGER AND SWITCH DATA SHEET ISSUE 6: APRIL 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

BCM 4709

Abstract: 78F1830 78F1834 78f1835 78f1845 78F1804 78f1826 78F1830GAA2-GAM-G ADS TS20 PD78F1841
Contextual Info: User’s Manual 16 表紙 78K0R/Fx3 ユーザーズマニュアル ハードウェア編 16 ビット・シングルチップ・マイクロコントローラ 本資料に記載の全ての情報は本資料発行時点のものでありルネサス エレクトロニクスは、

Contextual Info: RAiO RA8875 Character/Graphic TFT LCD Controller Specification Version 1.2 January 10, 2012 RAiO Technology Inc. Copyright RAiO Technology Inc. 2011, 2012 RAiO TECHNOLOGY INC. 1/175 www.raio.com.tw RA8875 Version 1.2 Character / Graphic TFT LCD Controller

20-PIN

Abstract: DS2143 DS218 DS2180A DS2181A DS2186 DS2186S DS2187 DS2188
Contextual Info: DS 2186 DALLAS s e m ic o n d u c to r FEATURES • Line interface fo rT 1 1.544 MHz and CEPT (2.048 MHz) prim ary rate networks DS2186 Transm it Line Interface PIN ASSIGNMENT W TA IS Q 1 20 : LCLK ZCSEN Q 2 19 : LPOS 3 18 : LNEG • Program m able output pulse shape supports s h o rtand lon g -lo o p applications

E1 to ethernet converter circuit

Abstract: BNC to twisted pair adaptor characteristics of twisted pair cable LXT906PC Twisted Pair twisted pair cable with parameter 10BASE2 10BASE5 10BT DP8392
Contextual Info: LXT906 Ethernet Twisted-Pair/Coax Adapter APRIL, 1996 TABLE OF CONTENTS DATA SHEET LXT906 Ethernet Twisted-Pair/Coax Adapter GENERAL INFORMATION 1 T1/E1 SHORT-HAUL TRANSCEIVERS AND RECEIVERS General Description 2 T1/E1 C 3 Features The LXT906 Twisted-Pair/Coax Adapter is designed to

Contextual Info: PM7326 S/UNI APEX DATA SHEET ISSUE 8 ATM/PACKET TRAFFIC MANAGER AND SWITCH 3: 39 PM PMC-1981224 02 02 :0 PM7326 TM r, 20 S/UNI - De ce m be APEX n Tu es da y, 03 S/UNI APEX DATA SHEET ISSUE 8: SEPTEMBER 2002 Do wn lo ad ed by Pa rtM i ne rI nc of Pa rtm in

tp link schematic circuit diagram

Abstract: LXT906PC ltpr 10BASE2 10BASE5 10BT DP8392 F1000 LXT906 LTPC
Contextual Info: DATA SHEET MAY 1997 LXT906 Revision 2.1 Ethernet Twisted-Pair / Coax Adapter General Description Features The LXT906 Twisted-Pair/Coax Adapter is designed to allow a cost effective Ethernet implementation in a mixed media environment. Combined with a coax transceiver

GSM0610

Abstract: Voice Activity Detector ARSA 2A00 ADSP-2100 ADSP-2101 ADSP-2111 ADSP-2171 GSM0632 ADSP210x
Contextual Info: GSM Codec 4.1 4 OVERVIEW This chapter describes the implementation of the Pan-European Digital Mobile Radio DMR Speech Codec Specification 06.10. This code was developed in accordance with the recommendation of the Conference of European Post and Telecommunications’ (CEPT) Group Special Mobile

Contextual Info: DP83840A 10/100 Mb/s Ethernet Physical Layer Features General Description The DP83840A is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded, Type 1 Shielded and Fiber Optic cables. te This VLSI device is designed for easy implementation of

ltsx

Contextual Info: PM7326 S/UNI-APEX PMC-Sierra,Inc. ATM/PACKET Traffic Manager and Switch FEATURES • Traffic queuing algorithm is highly configurable on a per connection, per class, and per port basis. • Configurable scheduling of 4 classes of service on every port, with rate

mb 3712

Abstract: LFSR DP83840A IEEE 802.3u 100Base BLM31A02 100BASE-FX DP83223
Contextual Info: DP83840A 10/100 Mb/s Ethernet Physical Layer Features General Description The DP83840A is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded, Type 1 Shielded and Fiber Optic cables. This VLSI device is designed for easy implementation of

LT1772

Abstract: LTPQ MARKING LTPR ltpt LTml LTML MARKING LT1962EMS8-5 LT1962 LT1962-3 LT1962-5
Contextual Info: Final Electrical Specifications LT1962 Series 300mA, Low Noise, Micropower LDO Regulators April 2000 U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Low Noise: 20µVRMS 10Hz to 100kHz Output Current: 300mA Low Quiescent Current: 30µA

LTSX

Abstract: CRC10 CRC32 PM7326
Contextual Info: PM7326 S/UNI-APEX PMC-Sierra,Inc. ATM/PACKET Traffic Manager and Switch FEATURES • Traffic queuing algorithm is highly configurable on a per connection, per class, and per port basis. • Configurable scheduling of 4 classes of service on every port, with rate

ltpr

Contextual Info: LT1962 Series 300mA, Low Noise, Micropower LDO Regulators U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Low Noise: 20µVRMS 10Hz to 100kHz Output Current: 300mA Low Quiescent Current: 30µA Wide Input Voltage Range: 1.8V to 20V

diode 368b

Abstract: HUV131 HUV132 HVC376B 358B diode varicap 5.8 Ghz hvc365 cross HVC 3-12 varicap diode c05 10 48 diode
Contextual Info: Tune your Circuits Mobile Phone Applications Hitachi’s range of Varicap and PIN diodes addresses the needs of todays mobile phone development engineers. A small package, wide tuning range, low operating voltage and low noise have made these diodes one of

f0035

Abstract: F0410 P1203 R5F10c tm-1017
Contextual Info: User’s Manual 16 RL78/D1A User’s Manual: Hardware 16-Bit Single-Chip Microcontrollers -Preliminary- All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

LTSX E3

Contextual Info: DATASHEET PM PMC-981224 ISSUE 3 PRELIMINARY PMC-Sierra, Inc. PM7326 s / u n i -a p e x ATM/PACKET TRAFFIC MANAGER AND SWITCH PM7326 TM S /U N I- APEX S/UNI-APEX ATM/PACKET TRAFFIC MANAGER AND SWITCH DATA SHEET PRELIMINARY ISSUE 3: JUNE 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE