SN54LS112A Search Results

54s112

Abstract: 74LS112A 74S112
Contextual Info: SN54LS112A, SN54S112, SN74LS112A. SN74S112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR _ Fully Buffered to Offer Maximum Isolation from External Disturbance • D 2 6 6 1 . A P R IL 1 9 8 2 - R E V I S E D M A R C H 1 9 8 8

SN74LS112

Abstract: SN54LS112A SN54S112 SN74LS112A SN74S112A SN54L5112A 5S012
Contextual Info: SN54LS112A, SN54S112, SN74 LS112A , SN74 S 112 A D U A L J-K NE GAT IVE EDGE-TRIGGERED FLIP FLO P S WITH PR ESE T AN D CLEA R SDLS011 D 2 6 6 1 , APRIL 1 9 8 2 —REVISED M A R C H 1 9 8 8 • Fully Buffered to Offer Maximum Isolation from External Disturbance

Contextual Info: M M O T O R O L A SN54LS112A SN74LS112A D E S C R IP T IO N — The S N 5 4 L S /7 4 L S 1 12 A dual JK flip -flo p features individual J, K, clock, and asynchronous set and clear inputs to each flip -flo p . W hen the clock goes HIGH, the inputs are enabled and data

SN74S112

Abstract: LS112A S112 SN54LS112A SN54S112 SN74 SN74LS112A CU12B
Contextual Info: TYPES SN54LS112A, SN54S112, SN74LS112A, SN74S112 DUAL J -K NEG ATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR ^ _ Fully Buffered to O ffer M a xim u m Isolation from External Disturbance • R E V IS E D D E C E M B E R 1 9 8 3 S N 5 4 L S 1 1 2 A , S N 5 4 S 1 1 2 . . . J OR W P AC KA G E

Contextual Info: TYPES SN54LS112A, SN54S112, SN74LS112A, SN74S112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR REVISED DECEMBER 1983 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 L S 11 2 A , S N 5 4 S 1 1 2 . . . J OR W PACKAG E

Contextual Info: TYPES SN74LS112A, SN74S112A, SN54LS112A, SN54S112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR R E V IS E D D E C E M B E R 1986 Fully Buffered to Offer Maximum Isolation from External Disturbance Package Options Include Standard Plastic

MC68B21CP

Abstract: xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N
Contextual Info: SG379/D REV 7 Semiconductor Products Sector NORTH AMERICA SALES AND DISTRIBUTION PRICE LIST THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION – Please see General Information Section 1.3 EFFECTIVE DATE: JANUARY 10, 1998 General Information 1 Cross References

transistor mosfet buv18a

Abstract: M143206EVK MMBF4856 lm358 IC 68hc05sc24 telephone line interface circuit bc517 MC68B54 XC68HC705P9 MPX100ap BUV18A
Contextual Info: Device Index and Subject Index In Brief . . . Page Device Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.1–1 General Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2–1 Subject Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2–9

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) JM38510/07102BEA ACTIVE CDIP

Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

SN7401

Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
Contextual Info: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package

sn74ls151 multiplexer vhdl code

Abstract: MC14500B MC667 MC14000B MC672 equivalent MC661 MC672 MC660 bounce eliminator mc12073
Contextual Info: Logic: Standard, Special and Programmable In Brief . . . Page Motorola Programmable Arrays MPA . . . . . . . . . . . . 3.1–1 Selection by Function Logic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1–8 Device Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1–36

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) JM38510/07102BEA ACTIVE CDIP

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2009 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2)

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2)

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD Call TI Level-NC-NC-NC JM38510/07102BFA ACTIVE CFP W 16 1 TBD Call TI Level-NC-NC-NC Package Drawing Pins Package Eco Plan (2)

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD Call TI N / A for Pkg Type Package Drawing

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD Call TI Level-NC-NC-NC JM38510/07102BFA ACTIVE CFP W 16 1 TBD Call TI Level-NC-NC-NC Package Drawing Pins Package Eco Plan (2)

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2)