W22 SRAM Search Results

D164K

Abstract: L69 MARKING CODE 5962-9206203MYX CY7C245-35DMB smd CY 203 CY7C424-40DMB 14LX smd cross reference SMD MARKING CODE UV 5962-85525
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative for the latest SMD update. DESC SMD Standardized Military Drawing Approvals[1] Package[3] SMD Number 84036 84036

smd transistor w16

Abstract: transistor smd w16 PALC22V10B-15DMB 256K x 8 SRAM CY7C128A SRAM PALC22V10B-20DMB Mil JAN jm38510 Cross Reference smd cross reference smd w20 CY7C245-45WMB 455b
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have an X in the PPL (Preferred

D168K

Abstract: PALC22V10B-20DMB CY7C186A-20DMB CY7C109L CY7C408A-15DMB CY7C342B-25RMB palc22v10b20dmb PALCE22V10-30DMB PALC22V10-30DMB CY6116A35LMBSMD
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have a date in the PPL (Preferred

D168K

Abstract: smd cross reference 14LX PALC22V10B-15DMB CY7C271-35WMB PALC22V10B20WMB PALC22V10B-15LMB CY7C245-35WMB CY7C346-35RMB PALC22V10-25WMB
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have a date in the PPL (Preferred

5962-9311201MXX

Abstract: U208 CY7C245-35WMB PALC22V10D-30DMB smd cross reference PALC22V10B15KM CY7B991-7LMB CY37256P160-83UMB PALC22V10-30DMB CQFP 208
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have a date in the PPL (Preferred

PALC22V10B-20DMB

Abstract: PALC22V10B-15DMB CY37064P44-154YMB PALC22V10-25DMB CY37256P160-125UMB PALC22V10B-20KMB CY37512P208-100UMB PALC22V10-25WMB PALC22V10B-20WMB PALC22V10-30DMB
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have a date in the PPL (Preferred

Contextual Info: CY7C286 CY7C287 Features • Capable of withstanding >2001V static discharge • CMOS for optimum speed/power • Windowed for reprogrammability Functional Description • High speed — tSA = 45 ns 7C287 — tco = 15 ns (7C287) — tACC = 50 ns (7C286)

micron MT5C640

Contextual Info: MICRON T E C H N O L O G Y M I C R O INC S5E D billig ÜODSSfll TEO • URN MT5C6401 883C 64K X 1 SRAM N MILITARY SRAM 64K X 1 SRAM PIN A SSIG N M E N T Top View SMD 5962-86015 JAN M38510,292 MIL-STD-883, Class B Radiation tolerant (consult factory) 22-Pin DIP

LC 7258

Abstract: C-274
Contextual Info: bSE D C Y P R ES S S E M I C O N D U C T O R SSÖRbbE QQ1GS50 T M «CYP CY7C271 CY7C274 CYPRESS SEMICONDUCTOR Features Functional Description • CMOS for optimum speed/power • Windowed for reprogrammability • Highspeed •— 30 ns commercial •— 35 ns (military)

NM6403

Abstract: mops 520 u1630
Contextual Info: АРХИТЕКТУРА ПРОЦЕССОРА Л1879ВМ1 NM6403 Процессор Л1879ВМ1 представляет собой высокопроизводительный специализированный микропроцессор, сочетающий в себе черты двух современных архитектур: VLIW (Very Long Instruction Word) и SIMD (Single Instruction

K4S641632K-UC75

Abstract: SAMSUNG K4S641632K-UC75 K4S641632K R1LV1616RSD-7SR h8sx uc75 LV1616RSD-7SR
Contextual Info: APPLICATION NOTE H8SX Family Transfer between Synchronous DRAM and External SRAM with EXDMAC Offset Addition Introduction Data are transferred by the EXDMAC function from the synchronous DRAM area (hereafter referred to as SDRAM) to the SRAM area using normal transfer mode where the transfer address is updated by adding a specified offset.

K4S641632K-UC75

Abstract: h8sx R1LV1616RSD-7SR K4S641632KUC75
Contextual Info: APPLICATION NOTE H8SX Family Transfer between Synchronous DRAM and External SRAM with EXDMAC Normal Transfer Introduction The EXDMAC function is used to transfer data from the synchronous DRAM area (hereafter referred to as SDRAM) to the SRAM area in normal transfer mode.

K4S641632K-UC75

Abstract: samsung k4s641632k-uc75 h8sx R1LV1616RSD-7SR
Contextual Info: APPLICATION NOTE H8SX Family Transfer between Synchronous DRAM and External SRAM with EXDMAC Block Transfer Introduction The EXDMAC function is used to transfer data from the synchronous DRAM area (hereafter referred to as SDRAM) to the SRAM area in block transfer mode.

h8sx

Abstract: R1LV1616RSD-7SR K4S641632K-UC75
Contextual Info: APPLICATION NOTE H8SX Family Transfer between Synchronous DRAM and External SRAM with EXDMAC Repeat Transfer Introduction The EXDMAC function is used to transfer data from the synchronous DRAM area (hereafter referred to as SDRAM) to the SRAM area in repeat transfer mode.

K4S641632K-UC75

Abstract: h8sx K4S641632K R1LV1616RSD-7SR samsung BCK0
Contextual Info: APPLICATION NOTE H8SX Family Transfer between Synchronous DRAM and External SRAM with EXDMAC Cluster Transfer Introduction The EXDMAC function is used to transfer data from the synchronous DRAM area (hereafter referred to as SDRAM) to the SRAM area in cluster transfer mode.

K4S641632K-UC75

Abstract: K4S641632K _INITSCT
Contextual Info: APPLICATION NOTE H8SX Family Synchronous DRAM Operation after Cancellation of Deep Software Standby Mode Introduction This application note describes the method for accessing synchronous DRAM SDRAM after cancellation of deep software standby mode. This method makes it possible to avoid problems related to the period of Bφ and SDRAMφ output instability

IN69P

Abstract: in60p OCX1601LPB420 OCX1601 OCX1601L fairchild aa26 OCX1601PPB420 IN71N IN60N aa26 fairchild
Contextual Info: Preliminary Revised April 2003 OCX1601L • OCX1601P Crosspoint Switch with LVDS Preliminary • Crosspoint Switch with LVPECL (Preliminary) General Description Features The OCX1601L and OCX1601P are SRAM-based device is a non-blocking 80 X 80 digital crosspoint switch capable

in69p

Abstract: IN50P in60p IN55N IN69N IN60N IN34N IN68N IN65P IN68P
Contextual Info: Preliminary Revised April 2003 OCX160L • OCX160P Crosspoint Switch with LVDS Preliminary • Crosspoint Switch with LVPECL (Preliminary) General Description Features The OCX160L and OCX160P are SRAM-based, nonblocking 80 X 80 digital crosspoint switches capable of

Y1 XTAL 12Mhz

Abstract: ADSP-BF525C ADSP-BF522C BC289 AB22-AB23 ADSP-BF525
Contextual Info: a Preliminary Technical Data Blackfin Embedded Processor ADSP-BF522C/ADSP-BF525C/ADSP-BF527C FEATURES PERIPHERALS Up to 600 MHz high-performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of

diode t25 4 H9

Abstract: diode t25 4 L9 diode t25 4 k6 diode t25 4 k8 diode t25 4 G9 diode t25 4 F8 diode t25 4 B9 diode t25 4 g8 diode t25 4 F7 diode t25 4 L8
Contextual Info: Pin Information For The Stratix EP1S10 Device, ver 3.7 Note 2 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B1 B1 B1 B1 B1 B1 B1 B1 B1

chassis m28

Abstract: r20 ah16 ac3 downmix decoder AG13 ak27 diode AJ-12 transport Stream demux E20 L27 ag26 F28-F29
Contextual Info: STD2000 Single-Chip Worldwide iDTV Processor DATABRIEF SD/HD Digital Video ID Video Display Pipeline TNR, DEI, Scaling, IQI Graphics Display Driver HD Video Display Pipeline (TNR, DEI, Scaling, IQI) Dual DDEC 3D Comb Compositor SD/ID Analog Video Display

ak25

Contextual Info: STD2000 Single-Chip Worldwide iDTV Processor SD Analog Video HD Video Display Pipeline TNR, DEI, Scaling, IQI Dual DDEC 3D Comb HD Video Display Pipeline (TNR, DEI, Scaling, IQI) Display Driver SD/HD Digital Video Compositor DATA BRIEF Display LCD PDP

chassis m28

Abstract: GFX E6 AG29 Encoder e27 ATSC-A54 ae31 transport Stream demux ag13 gfx e4 m31 crt
Contextual Info: STD2000 Single-Chip Worldwide iDTV Processor DATABRIEF SD/HD Digital Video ID Video Display Pipeline TNR, DEI, Scaling, IQI Graphics Display Driver Dual DDEC 3D Comb Compositor HD Video Display Pipeline (TNR, DEI, Scaling, IQI) SD/ID Analog Video Display

Contextual Info: Section 10 Bus State Controller BSC 10.1 Overview The bus state controller (BSC) divides up the address spaces and outputs control for various types of memory. This enables memories like DRAM, SRAM, and ROM to be linked directly to the LSI without external circuitry.