ZEROPOWER RAM M48Z Search Results

M41Txx

Abstract: SO16 M48Z35A M48T35A m48t35 M48Z128 M48Z129 M48Z2M1 M48Z35 M48Z512A
Contextual Info: Non-Volatile -Volatile RAM Non RAM Selection Tables Selection Tables STMicroelectronics NVRAM Selection Tables July 2000 ZEROPOWER M48Zxxx TIMEKEEPER M48Txxx M48STxxx NVRAM SUPERVISOR M40Zxxx M40SZxxx M48Txxx Optional Low Power SRAM M68Zxxx SERIAL RTC

Contextual Info: /= 7 SCS-THOMSON M48Z02 M48Z12 raMÛilLIIOTMIlÊS 16Kb 2K x 8 ZEROPOWER SRAM • INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ UNLIMITED WRITE CYCLES ■ READ CYCLE TIME EQUALS WRITE CYCLE TIME ■ AUTOMATIC POWER-FAIL CHIP DESELECT and

Contextual Info: M48Z30 M48Z30Y CMOS 32K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with

M48Z128

Abstract: M48Z128Y
Contextual Info: M48Z128 M48Z128Y 1Mb 128K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT

PMDIP32

Contextual Info: M48Z128 M48Z128Y CMOS 128K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with

SOH28

Abstract: ic mt 1628 NVRAM STMicroelectronics date CODE so-8 soic date code stmicroelectronics Zeropower ram M48Z m48t35 STMicroelectronics PRODUCT code date m48 M48Z129V M48Z18
Contextual Info: Non-volatile RAMs Selection guide September 2007 www.st.com/nvram ZEROPOWER NVRAMs • ■ Battery backed SRAM 16 Mbit to 16 Kbit Density 16 Mb 2 Mx8 4 Mb (512 Kx8) 1 Mb (128 Kx8) 256 Kb (32 Kx8) 64 Kb (8 Kx8) 16 Kb (2 Kx8) Part number VCC [V] M48Z2M1Y

M48Z2M1

Abstract: M48Z2M1Y
Contextual Info: M48Z2M1 M48Z2M1Y 16 Mb 2Mb x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT

M48Z512

Contextual Info: M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with

M4Z32-BROOSH1

Abstract: M4Z28-BROOSH1 SOH28 m48t35 M4T28-BR12SH1 Zeropower M40SZ100 M40SZ100W M40Z111 M40Z300W
Contextual Info: Non-volatile RAM and RTC Selection guide High density surface mount solutions 32Mb NVRAM LPS LPS LPS LPS 16Mb with parallel RTC RAM RAM LPS RAM T212 RAM RAM LPS RAM 2x 8Mb LPSRAMs M48T212 M40Z300 “Hatless” 4x 8Mb LPSRAMs Mix and match ST SUPERVISORs, LPSRAMs and SNAPHAT tops for a surface mount

512k 8 sram 3v power supply

Abstract: 512K x 8 bit sram 32 pin M48Z512A M48Z512AY
Contextual Info: M48Z512A M48Z512AY 4 Mb 512K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER AUTOMATIC POWER-FAIL CHIP DESELECT

D 4242

Abstract: PMDIP32 M48Z129V M48Z129Y
Contextual Info: M48Z129Y M48Z129V 1Mb 128K x 8 ZEROPOWER SRAM PRELIMINARY DATA INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER MICROPROCESSOR POWER-ON RESET

Zeropower ram MK48Z02

Abstract: MK48Z02-12 R912
Contextual Info: M48Z02 M48Z12 /= T SGS-THOMSON ^ 7 # ^D g[S(ô [l[Li ir^®RgO©S CMOS 2K x 8 ZEROPOWER SRAM • PIN and FUNCTION COMPATIBLE with the MK48Z02.12 ■ SELF CONTAINED BATTERY in the CAPHAT DIP PACKAGE ■ 11 YEARS of DATA RETENTION in the ABSENCE of POWER ■ CHOICE of TWO WRITE PROTECT

sram 2k x 8

Contextual Info: M48Z02 M48Z12 CMOS 2K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY UNLIMITED WRITE CYCLES READ CYCLE TIME EQUALS WRITE CYCLE TIME AUTOMATIC POWER-FAIL CHIP DESELECTand WRITE PROTECTION CHOICE of TWO WRITE PROTECT

M48Z512

Contextual Info: M48Z512 M48Z512Y CMOS 512K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAMs, POWER-FAIL CONTROL CIRCUIT and BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 5 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 512K x 8 SRAMs

M48Z128

Abstract: M48Z128Y
Contextual Info: M48Z128 M48Z128Y CMOS 128K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 128K x 8 SRAMs

129Y

Abstract: m48z129v M48Z129Y
Contextual Info: M48Z129Y M48Z129V 1Mb 128K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER MICROPROCESSOR POWER-ON RESET

MK48Z09

Abstract: M48Z09 M48Z19
Contextual Info: M48Z09 M48Z19 CMOS 8K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY UNLIMITED WRITE CYCLES READ CYCLE TIME EQUALS WRITE CYCLE TIME AUTOMATIC POWER-FAIL CHIP DESELECTand WRITE PROTECTION POWER-FAIL INTERRUPT

T1A12

Abstract: MK48Z09 M48Z09 M48Z19
Contextual Info: M48Z09 M48Z19 /S T SGS-THOMSON ^7# [M ^©ILi©T0M[] g§ CMOS 8K x 8 ZEROPOWER SRAM • PIN and FUNCTION COMPATIBLE with the MK48Z09.19 ■ SELF CONTAINED BATTERY in the CAPHAT DIP PACKAGE ■ 11 YEARS of DATA RETENTION in the ABSENCE of POWER ■ CHOICE of TWO WRITE PROTECT

m48z32y

Contextual Info: M48Z32 M48Z32Y CMOS 32K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY UNLIMITED WRITE CYCLES READ CYCLE TIME EQUALS WRITE CYCLE TIME 10 YEARS of DATA RETENTION in the ABSENCE of POWER at 70 °C PIN and FUNCTION COMPATIBLE with

PCDIP24

Abstract: M48Z02 Zeropower DS1220 M48Z02 M48Z12
Contextual Info: M48Z02 M48Z12 16Kb 2K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY UNLIMITED WRITE CYCLES READ CYCLE TIME EQUALS WRITE CYCLE TIME AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES

M48Z35

Abstract: M48Z35V M48Z35Y SOH28
Contextual Info: M48Z35 M48Z35Y, M48Z35V 256 Kbit 32Kb x8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY READ CYCLE TIME EQUALS WRITE CYCLE TIME AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES

Contextual Info: M48Z08 M48Z18 / = T SGS-THOMSON 7 # ^ [ *[ E i[ L [ I M ( Q M ( g S CMOS 8K x 8 ZEROPOWER SRAM • PIN and FUNCTION COMPATIBLE with the MK48Z08.18 ■ SELF CONTAINED BATTERY in the CAPHAT DIP PACKAGE ■ SMALL OUTLINE PACKAGE PROVIDES DI­ RECT CONNECTION for a SNAPHAT HOUS­

Contextual Info: 5 ï. S G S -1H 0M S 0N ILIMMûiêS M48Z129Y M48Z129V 1Mb 128K x 8 ZEROPOWER SRAM PRELIMINARY DATA • INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS of DATA RETENTION in the

caphat

Contextual Info: M48Z59 CMOS 8K x 8 ZEROPOWER SRAM DATA BRIEFING INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY MICROPROCESSOR POWER-ON RESET Valid all the way to VCC = VSS AUTOMATIC POWER-FAIL CHIP DESELECTand WRITE PROTECTION CHOICE of TWO WRITE PROTECT