MT4C4256DJ Search Results

marking WMM

Abstract: RA52 1cas5 22r29
Contextual Info: 1 MEG x 4 DRAM DRAM QUAD CAS PARITY, FAST PAGE MODE FEATURES • Four independent CAS controls, allowing individual m anipulation to each of the four data In p u t/O u tp u t ports DQ1 through DQ4 . • Offers a single chip solution to byte level parity for 36bit w ords w hen using 1 Meg x 4 DRAMs for mem ory

Contextual Info: M IC R O N 512K 512K X MT20D51240 40 DRAM MODULE 40 DRAM FAST PAGE MODE MT20D51240 LOW POWER, EXTENDED REFRESH (MT20D51240 L) FEATURES • • • • • • • • • PIN ASSIGNMENT (Top View) 72-pin single-in-line package High-performance, CMOS silicon-gate process.

Contextual Info: MT10D25636 256K X 36, 512K x 18 DRAM MODULE M IC R O N DRAM MODULE 256K x 36, 512K x 18 FAST PAGE MODE FEATURES • • • p ackage H ig h -p erfo rm an ce, C M O S silico n -g a te process. S in g le 5 V ± 1 0 % p o w er sup p ly A ll d e v ice p in s a re fu lly T T L co m p atib le

MT1805

Contextual Info: M IC R O N 512K DRAM MODULE 512K X X MT18D51236 36 DRAM MODULE 36 DRAM FAST PAGE MODE FEATURES PIN ASSIGNMENT (Top View OPTIONS 72-Pin SIMM (T-12) MT18D51236M/G MARKING • T im ing 60ns access 70ns access 80ns access P ackages L ead less 7 2 -p in SIM M

3CE12

Contextual Info: PIICRON TECHNOLOGY INC b lllS H * SSE D PRELIMINARY Tf.CHNOlOCr INC. - - 1 “ DRAM w t - z v n 256K X 4 DRAM FEATURES • • • • • • • • Best memory solution for 3.3V flat-panel controllers Single +3.3V ±5% power supply

MT4C4256

Abstract: 20-PIN MT4C4256DJ-7
Contextual Info: OBSOLETE MT4C4256 L 256K x 4 DRAM DRAM 256K x 4 DRAM STANDARD OR LOW POWER, EXTENDED REFRESH FEATURES • 512-cycle refresh in 8ms (MT4C4256) or 64ms (MT4C4256 L) • Industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process

Contextual Info: MT4C4256 L 256K X 4 DRAM [M IC R O N 256K DRAM X 4 DRAM FEATURES PIN ASSIGNMENT (Top View) • 512-cycle refresh in 8ms (MT4C4256) or 64ms (MT4C4256 L) • Industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process

256k x 8 dram

Abstract: SIMM 30-pin
Contextual Info: MT2D2568 256K X 8 DRAM M ODULE [MICRON DRAM . . 256K x 8 DRAM _ FAST PAGE MODE MT2D2568 LOW POWER, EXTENDED REFRESH (MT2D2568 L) M O DULE IV IV L fU I-L . FEATURES PIN ASSIGNMENT (Top View) OPTIONS MARKING • Timing 60ns access 70ns access 80ns access

MT4C4256DJ-7

Abstract: BBU RRH
Contextual Info: MT4C4256 L 256K X 4 DRAM I^ IIC Z R O N DRAM 256K x 4 DRAM FEATURES PIN ASSIGNMENT (Top View) • 512-cycle refresh in 8ms (MT4C4256) or 64ms (MT4C4256 L) • Industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process

Contextual Info: M IC R O N MT8C36256 DRAM MODULE 256K X 36 DRAM FEATURES OPTIONS DRAM MODULE PIN ASSIGNMENT (Top View • Industry standard pin-out in a 72-pin single-in-line package • High performance CMOS silicon gate process. • Single 5V±10% power supply • All inputs, outputs and clocks are fully TTL and

Contextual Info: f ^ lC R O IN J 256K DRAM MODULE X MT9D25636 36 DRAM MODULE 256K x 36 DRAM FAST PAGE MODE FEATURES • Common RAS control pinout in a 72-pin single-in-line package • High-performance, CMOS silicon-gate process • Single 5V ±10% power supply • All device pins are fully TTL compatible

Contextual Info: MICRON TECHNOLOGY INC 3ÖE D blllSMI G0DS1Ö1 I B M R N rm rr l*V vw*1-* V 1, g i f t innViliMfrfr^n i 1 MEG x 4 DRAM DRAM QUAD CAS PARITY, FAST PAGE MODE FEATURES Four independent CAS controls, allowing individual manipulation to each of the four data Input/O utput

ICC-427

Contextual Info: M IC R O N 256K DRAM X MT10D25640 40 DRAM M ODULE 256K x 40 DRAM _ MOD ULF L / V / I— ! — I V I W FEATURES • • • • • • • • • 72-pin single-in-line package High-performance, CMOS silicon-gate process. Single 5V ±10% power supply All device pins are fully TTL compatible

Contextual Info: MICRON 256K X MT8D25632 32, 512K x 16 DRAM M O D ULE DRAM » « Ä . _ 256K x 32> 512K x 16 FAST PAGE MODE (MT8D25632 IV IV / L ^ U F EXTENDED Y T F M n F n R REFRESH F M O D U LE V k LOW POWER, (MT8D25632 L) FEATURES PIN ASSIGNMENT (Top View) OPTIONS MARKING

Contextual Info: MICRON SEMICONDUCTOR INC b3E D • GG07b0S T7T ■ URN MT4C4256 L 256K X 4 DRAM MICRON 256K X 4 DRAM DRAM FEATURES PIN ASSIGNMENT (Top View) • 512-cycle refresh in 8ms (MT4C4256) or 64ms (MT4C4256 L) • Industry-standard x4 pinout, timing, functions and

Contextual Info: MT4C4256 L 256K X 4 DRAM I^IICRON DRAM 256K X 4 DRAM FEATURES • Industry standard x4 pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V +10% power supply • Low power, .3mW standby; 150mW active, typical

MT8C

Contextual Info: M I CR ON T E C H N O L O G Y INC L muii.c i biiiSMT 0002335 3 ñE D ni»B¡wywn^B^ . w t IMRN r r ~ y ¿ -2 3 -/7 1»I ' n i i - fi ; K ' -i «ü iS n U - ififi i J i a i • tr iù tfr m u lti.M ' REPLACES: MT8C9256 and MT8C9257 256K X 9 DRAM DRAM MODULE

30-pin SIMM

Abstract: 256k 30-pin SIMM
Contextual Info: I^ IIC R O N MT8C9256 256K X 9 DRAM DRAM MODULE REFRESH: 512 CYCLE/8MS FEATURES PIN ASSIGNMENT Top View • Industry standard pin-out in a 30-pin single-in-line memory module • Single 5V±10% power supply • All inputs, outputs and clocks are fully TTL

Contextual Info: PRELIM INARY DRAM 256K X 4 DRAM FEATURES • • • • • • • • • • • • PIN ASSIGNMENT Top View Best memory solution for 3.3V flat-panel controllers Single +3.3V ±5% power supply TSOP and SOJ compatible with 1 Meg x 4 TSOP Industry standard x4 pinout, timing, functions and

mt8d25632

Contextual Info: I^ IIC R O N 256K DRAM _ _Ä W 32, 512K x MT8D25632 16 DRAM MODULE 256K X 32, 512K _ _ X 16 FAST-PAGE-MODE MT8D25632 LOW POWER, EXTENDED REFRESH (MT8D25632 L) MODULE I V I V W X I . L . FEATURES • Industry-standard pinout in a 72-pin single-in-line package

Contextual Info: MT9D25636 256K X 36 DRAM MODULE |V /|K = R O N 256K X 36 DRAM DRAM MODULE FAST PAGE MODE FEATURES OPTIONS MARKING • Timing 60ns access 70ns access 80ns access - 6 - 7 - 8 • Packages Leadless 72 -pin SIMM Leadless 72 -pin SIMM Gold 72-Pin SIMM (T" 11)

MT8C36512

Contextual Info: MICRON MT8C36512 DRAM MODULE 512K x 36 DRAM PIN ASSIGNMENT Top View OPTIONS 72 PIN SIMM (MO) o MARKING • Timing 80ns access 100ns access 120ns access • - 8 -10 -12 • Lead dress Tin/L ead Gold (SIMM only) None G • Packages: Leadless 72 -pin SIMM Leaded 72-pin ZIP

Contextual Info: [ M IC R O N MT4C4259 DRAM 256K x 4 DRAM QUAD CAS PARITY, FAST PAGE MODE FEATURES • Four independent CAS controls offer individual m anipulation to each of the four data In p u t/O u tp u t ports DQ1 through DQ4 . • Offers a single-chip solution to byte-level parity for 36bit w ords w hen using 256K x 4 DRAMs for memory.

U18 524

Contextual Info: MICRON TECHNOLOGY INC 14E D • tlllSMT DOOIOMI T ■ T -V ¿ -¿ 3 - / 7 512K X 36 DRAM DRAM MODULE FEATURES 72 PIN SIMM MO MODULE OPTIONS DRAM PIN ASSIGNMENT (Top View) • Industry standard pin-out in a 72-pin single-in-line package • High performance CMOS silicon gate process.